HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 698

IC SUPERH MPU ROMLESS 208LQFP

HD6417709SF133B

Manufacturer Part Number
HD6417709SF133B
Description
IC SUPERH MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417709SF133B

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 2.05 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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22.4.2
Table 22.4 Reset Configuration
ASE
ASE
ASE
ASEM M M M D D D D 0 0 0 0 *
High-level
Low-level
Notes: 1. Selects main chip mode or ASE mode
Rev. 5.00, 09/03, page 652 of 760
2. In ASE mode, reset hold is enabled by driving the RESETP and TRST pins low for a
3. There are two ASE modes, one for executing software in the emulator’s firmware (ASE
Reset Configuration
1
ASEMD0 = H, normal mode
ASEMD0 = L, ASE mode
Set ASEMD0 = H when using on the user system alone, without an emulator and the
UDI.
constant cycle. In this state, the CPU does not start up, even if RESETP is driven high.
When TRST is driven high, UDI operation is enabled, but the CPU does not start up.
The reset hold state is cancelled by the following:
• Boot request from UDI
• Another RESETP assert (power-on reset)
break mode) and one for executing user software (ASE user mode).
R R R R ESE
Low-level
High-level
Low-level
High-level
ESE
ESET T T T P P P P
ESE
T T T T R R R R S S S S T T T T
Low-level
High-level
Low-level
High-level
Low-level
High-level
Low-level
High-level
Chip State
Normal reset and UDI reset
Normal reset
UDI reset only
Normal operation
ASE user mode *
ASE break mode *
UDI reset only
Normal operation
Reset hold *
2
3
: Normal reset
3
: RESETP assertion
masked

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