HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 487

• Manufacturer Part Number: HD6417709SF133B
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417709SF133B

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 2.05 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Bit 6—Receive Data Register Full (RDRF): Indicates that SCRDR contains received data.
Note: SCRDR and RDRF are not affected by detection of receive errors or by clearing of the RE
Bit 5—Overrun Error (ORER): Indicates that data reception aborted due to an overrun error.
Notes: 1. Clearing the RE bit to 0 in the serial control register does not affect the ORER bit, which
Bit 6: RDRF
0
1
Bit 5: ORER
0
1
bit to 0 in the serial control register. They retain their previous contents. If RDRF is still set
to 1 when reception of the next data ends, an overrun error (ORER) occurs and the receive
data is lost.
2. SCRDR continues to hold the data received before the overrun error, so subsequent
retains its previous value.
receive data is lost. Serial receiving cannot continue while ORER is set to 1. In
synchronous mode, serial transmitting is also disabled.
Description
SCRDR does not contain valid receive data
[Clearing conditions]
(1) RDRF is cleared to 0 when the chip is reset or enters standby mode.
(2) Software reads RDRF after it has been set to 1, then writes 0 in RDRF.
SCRDR contains valid receive data
[Setting condition]
RDRF is set to 1 when serial data is received normally and transferred from
SCRSR to SCRDR.
Description
Receiving is in progress or has ended normally *
[Clearing conditions]
(1) ORER is cleared to 0 when the chip is reset or enters standby mode.
(2) When software reads ORER after it has been set to 1, then writes 0 to
A receive overrun error occurred *
[Setting condition]
ORER is set to 1 if reception of the next serial data ends when RDRF is set to 1.
ORER.
2
Rev. 5.00, 09/03, page 441 of 760
1
(Initial value)
(Initial value)