HD6417709SF133B Renesas Electronics America, HD6417709SF133B Datasheet - Page 304

• Manufacturer Part Number: HD6417709SF133B
• Description: IC SUPERH MPU ROMLESS 208LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417709SF133B

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 2.05 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

10.2.13 MCS0 Control Register (MCSCR0)
The MCS0 control register (MCSCR0) is a 16-bit readable/writable register that specifies the
MCS[0] pin output conditions.
MCSCR0 is initialized to H'0000 by a power-on reset, but is not initialized by a manual reset or in
standby mode.
As the MCS[0] pin is multiplexed as the PTC0 pin, when using the pin as MCS[0], bits
PC0MD[1:0] in the PCCR register should be set to 00 (other function).
Bits 15 to 7—Reserved: These bits are always read as 0. The write value should always be 0.
Bit 6—CS2/CS0 Select (CS2/0): Selects whether an area 2 or area 0 address is to be decoded.
Bit 6: CS2/0
0
1
Only 0 should be used for the CS2/0 bit in MCSCR0. Either 0 or 1 may be used for MCSCR1 to
MCSCR7.
Bits 5 and 4—Connected Memory Size Specification (CAP1, CAP0)
Bit 5: CAP1
0
0
1
1
Bits 3 to 0—Start Address Specification (A25, A24, A23, A22): These bits specify the start
address of the memory area for which MCS[0] is asserted.
Rev. 5.00, 09/03, page 258 of 760
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
Description
Area 0 is selected
Area 2 is selected
Bit 4: CAP0
0
1
0
1
15
—
—
R
R
0
7
0
CS2/0
R/W
14
—
R
0
6
0
CAP1
R/W
13
—
R
0
5
0
Description
32-Mbit memory is connected
64-Mbit memory is connected
128-Mbit memory is connected
256-Mbit memory is connected
CAP0
R/W
12
—
R
0
4
0
R/W
A25
11
—
R
0
3
0
R/W
A24
10
—
R
0
2
0
R/W
A23
—
R
9
0
1
0
R/W
A22
—
R
8
0
0
0