DS33Z41 Maxim Integrated Products, DS33Z41 Datasheet - Page 103

• Manufacturer Part Number: DS33Z41
• Description: Network Controller & Processor ICs Quad Inverse-Multipl exing Ethernet Mappe
• Manufacturer: Maxim Integrated Products

Specifications of DS33Z41

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: Receive Packet Count (RPC7 to RPC0). Eight bits of a 24-bit value. Register description below.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: Receive Packet Count (RPC15 to RPC8). Eight bits of a 24-bit value. Register description below.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: Receive Packet Count (RPC23 to RPC16). These 24 bits indicate the number of packets stored in
the receive FIFO without an abort indication. Note: Packets discarded due to system loopback or an overflow
condition are included in this count. This register is valid when clear channel is enabled.
RPC15
RPC23
RPC7
7
0
7
0
7
0
RPC14
RPC22
RPC6
6
0
6
0
6
0
LI.RPCB0
Receive Packet Count Byte 0 Register
108h
LI.RPCB1
Receive Packet Count Byte 1 Register
109h
LI.RPCB2
Receive Packet Count Byte 2 Register
10Ah
RPC13
RPC21
RPC5
5
0
5
0
5
0
103 of 167
RPC12
RPC20
RPC4
4
0
4
0
4
0
RPC11
RPC19
RPC3
3
0
3
0
3
0
RPC10
RPC18
RPC2
2
0
2
0
2
0
RPC09
RPC17
RPC1
1
0
1
0
1
0
RPC08
RPC16
RPC0
0
0
0
0
0
0