DS33Z41 Maxim Integrated Products, DS33Z41 Datasheet - Page 35

• Manufacturer Part Number: DS33Z41
• Description: Network Controller & Processor ICs Quad Inverse-Multipl exing Ethernet Mappe
• Manufacturer: Maxim Integrated Products

Specifications of DS33Z41

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The command and status registers for the IMUX function are detailed below:
Table 8-4. Command and Status for the IMUX for Processor Communication
IMUX Configuration Register
IMUX Command Register
IMUX Sync Status Register
IMUX Sync Latched Status Register
IMUX Interrupt Mask Register
Differential Delay Register
Differential Delay Error Interrupt
Enable Register
Differential Delay Latched Status
Register
OOF Interrupt Enable
OOF Latched Status Register
REGISTER
GL.IMXDFDELS
GL.IMXOOFLS
GL.IMXOOFIE
GL.IMXDFEIE
GL.IMXDFD
GL.IMXSLS
GL.IMXSIE
GL.IMXCN
GL.IMXSS
GL.IMXC
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NAME
Used to configure the number of links
participating and select T1 or E1.
Used to issue commands for link
management
Provides the real time sync status of
the 4 transmit and receive links
Latched status register for the IMXSS
register.
Interrupt enable bits for Sync Latched
Status bits
Provides the largest differential delay
value for the receive path. Measured
only at link initialization.
Interrupt enable for the differential
delay register.
Latched Status for GL.IMXDFD. Note
that differential delay is measured
only at link initiation.
Interrupt enable for the IMXOOFLS
register.
Indicates out of frame conditions for
both ends of the communication. If
detected, the user must re-initiate all
links.
COMMENTS