DS33Z41 Maxim Integrated Products, DS33Z41 Datasheet - Page 165

• Manufacturer Part Number: DS33Z41
• Description: Network Controller & Processor ICs Quad Inverse-Multipl exing Ethernet Mappe
• Manufacturer: Maxim Integrated Products

Specifications of DS33Z41

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.5 JTAG Functional Timing
This functional timing for the JTAG circuits shows:
Figure 12-3. JTAG Functional Timing
(STATE)
JTRST
Output
JTCLK
(INST)
JTDO
JTMS
JTDI
•
•
•
•
•
Pin
The JTAG controller starting from reset state.
Shifting out the first 4 LSB bits of the IDCODE.
Shifting in the BYPASS instruction (111) while shifting out the mandatory X01 pattern.
Shifting the TDI pin to the TDO pin through the bypass shift register.
An asynchronous reset occurs while shifting.
Reset
X
Run Test
Idle
Select DR
Scan
Capture
DR
IDCODE
Shift
DR
X
Exit1
DR
Update
DR
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Output pin level change if in "EXTEST" instruction mode
Select DR
Scan
Select IR
Scan
Capture
IR
Shift IR
X
Exit1
IR
Update
IR
X
Select DR
Scan
Capture
DR
BYPASS
Shift
DR
Logic Idle
X
IDCODE
X
Test