DS33Z41 Maxim Integrated Products, DS33Z41 Datasheet - Page 113

• Manufacturer Part Number: DS33Z41
• Description: Network Controller & Processor ICs Quad Inverse-Multipl exing Ethernet Mappe
• Manufacturer: Maxim Integrated Products

Specifications of DS33Z41

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: MAC Read Data Byte 1 (MACRD15 to MACRD8). One of four bytes of data read from the MAC.
Valid after a read command has been issued and the SU.MACRWC.MCS bit is zero.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: MAC Read Data Byte 2 (MACRD23 to MACRD16). One of four bytes of data read from the MAC.
Valid after a read command has been issued and the SU.MACRWC.MCS bit is zero.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: MAC Read Data Byte 3 (MACRD31 to MACRD24). One of four bytes of data read from the MAC.
Valid after a read command has been issued and the SU.MACRWC.MCS bit is zero.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: MAC Write Data Byte 0 (MACWD7 to MACWD0). One of four bytes of data to be written to the
MAC. Data has been written after a write command has been issued and the SU.MACRWC.MCS bit is zero.
MACWD7
MACRD15
MACRD23
MACRD31
7
0
7
0
7
0
7
0
MACWD6
MACRD14
MACRD22
MACRD30
6
0
6
0
6
0
6
0
SU.MACRD1
MAC Read Data Byte 1
143h
SU.MACRD2
MAC Read Data Byte 2
144h
SU.MACRD3
MAC Read Data Byte 3
145h
SU.MACWD0
MAC Write Data Byte 0
146h
MACWD5
MACRD13
MACRD21
MACRD29
5
0
5
0
5
0
5
0
MACWD4
MACRD12
MACRD20
MACRD28
113 of 167
4
0
4
0
4
0
4
0
MACWD3
MACRD11
MACRD19
MACRD27
3
0
3
0
3
0
3
0
MACWD2
MACRD10
MACRD18
MACRD26
2
0
2
0
2
0
2
0
MACWD1
MACRD9
MACRD17
MACRD25
1
0
1
0
1
0
1
0
MACWD0
MACRD8
MACRD16
MACRD24
0
0
0
0
0
0
0
0