DS33Z41 Maxim Integrated Products, DS33Z41 Datasheet - Page 38

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DS33Z41

Manufacturer Part Number
DS33Z41
Description
Network Controller & Processor ICs Quad Inverse-Multipl exing Ethernet Mappe
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS33Z41

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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It is recommended that the user reset the queue pointers for the connection after disconnection. The pointers
must be reset before a connection is made. If this disconnect/connect procedure is not followed, incorrect data
may be transmitted. The proper procedure for setting up a connection follows:
Table 8-5. Registers Related to Connections and Queues
8.11 Arbiter
The Arbiter manages the transport between the Ethernet port and the Serial port. It is responsible for queuing and
dequeuing packets to a single external SDRAM. The arbiter handles requests from the HDLC and MAC to
transfer data to and from the SDRAM.
REGISTER
AR.RQSC1
SU.QCRLS
AR.TQSC1
LI.TQCTLS
GL.C1QPR
GL.TRQIE
GL.TRQIS
GL.CON1
LI.TQTIE
SU.QRIE
Set up the queue sizes for both transmit and receive queue
Set up the high/low thresholds and interrupt enables if desired (GL.TRQIE, LI.TQTIE, SU.QRIE)
Reset all the pointers for the connection desired (GL.C1QPR)
Set up the connections (GL.CON1)
If a connection is disconnected, reset the queue pointers after the disconnection.
Enables connection between the Ethernet Interface and the Serial Interface. Note that
once connection is set up, then the queues and thresholds can be setup for that
connection.
Size for the Transmit Queue in Number of 32—2K packets.
Size for the Receive Queue in Number of 32—2K packets.
Interrupt enable for items related to the connections at the global level.
Interrupt enable status for items related to the connections at the global level.
Enables for the Transmit queue crossing high and low thresholds.
Latched status bits for connection high and low thresholds for the transmit queue.
Enables for the receive queue crossing high and low thresholds.
Latched status bits for receive queue high and low thresholds.
Resets the connection pointer.
38 of 167
FUNCTION
(AR.TQSC1
and AR.RQSC1).

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