DS33Z41 Maxim Integrated Products, DS33Z41 Datasheet - Page 55

• Manufacturer Part Number: DS33Z41
• Description: Network Controller & Processor ICs Quad Inverse-Multipl exing Ethernet Mappe
• Manufacturer: Maxim Integrated Products

Specifications of DS33Z41

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DS33Z41 Quad IMUX Ethernet Mapper
8.18 X.86 Encoding and Decoding
X.86 protocol provides a method for encapsulating Ethernet Frame onto LAPS. LAPS provides a HDLC-type
framing structure for encapsulation of Ethernet frames, but does not inflict dynamic bandwidth expansion as
HDLC does. LAPS encapsulated frames can be used to send data onto a SONET/SDH network. The DS33Z41
expects a byte synchronization signal to provide the byte boundary for the X.86 receiver. This is provided by the
RSYNC pin. The functional timing is shown in
Figure
11-7. The X.86 transmitter provides a byte boundary
indicator with the signal TSYNC. The functional timing is shown in
Figure
11-6. Note that in some cases,
additional logic may be required to meet RSYNC/TSYNC sychronization timing requirements when operating in
X.86 mode.
Figure 8-14. LAPS Encoding of MAC Frames Concept
IEEE
802.3 MAC Frame
LAPS
Rate Adaption
SDH
55 of 167