DS33Z41 Maxim Integrated Products, DS33Z41 Datasheet - Page 51

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DS33Z41

Manufacturer Part Number
DS33Z41
Description
Network Controller & Processor ICs Quad Inverse-Multipl exing Ethernet Mappe
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS33Z41

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Part Number:
DS33Z41
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DS33Z41 Quad IMUX Ethernet Mapper
8.15.5.2 Performance Monitoring Update
All counters stop counting at their maximum count. A counter register is updated by asserting (low to high
transition) the performance monitoring update signal (PMU). During the counter register update process, the
performance monitoring status signal (PMS) is deasserted. The counter register update process consists of
loading the counter register with the current count, resetting the counter, forcing the zero count status indication
low for one clock cycle, and then asserting PMS. No events shall be missed during an update procedure.
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