DS33Z41 Maxim Integrated Products, DS33Z41 Datasheet - Page 57

• Manufacturer Part Number: DS33Z41
• Description: Network Controller & Processor ICs Quad Inverse-Multipl exing Ethernet Mappe
• Manufacturer: Maxim Integrated Products

Specifications of DS33Z41

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The X86 received frame is aborted if:
For the transmitter if X.86 is enabled the sequence of processing is as follows:
Note that the Serial transmit and receive registers apply to the X.86 implementations with specific exceptions. The
exceptions are outlined in the Serial Interface transmit and receive register sections.
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Construct frame including start flag SAPI, Control and MAC frame
Calculate FCS
Perform transparency processing - 7E is translated to 7D5E, 7D is translated to 7D5D
Append the end flag(7E)
Scramble the sequence X
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If 7d, 7E is detected. This is an abort packet sequence in X.86.
Invalid FCS is detected.
The received frame has less than 6 octets.
Control, SAPI and address field are mismatched to the programmed value.
Octet 7d and octet other than 5d, 5e, 7e, or dd is detected.
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