DS33Z41 Maxim Integrated Products, DS33Z41 Datasheet - Page 135
DS33Z41
Manufacturer Part Number
DS33Z41
Description
Network Controller & Processor ICs Quad Inverse-Multipl exing Ethernet Mappe
Manufacturer
Maxim Integrated Products
Datasheet
1.DS33Z41.pdf
(167 pages)
Specifications of DS33Z41
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Register Name:
Register Description:
Register Address:
0300h:
Bit #
Name
Default
0301h:
Bit #
Name
Default
0302h:
Bit #
Name
Default
0303h:
Bit #
Name
Default
Bits 31 to 0: All Frames Transmitted Counter (TXFRMC31 to TXFRMC0). 32-bit value indicating the number of
frames transmitted. Each time a frame is transmitted, this counter is incremented by 1. This counter resets only
upon device reset, does not saturate, and rolls over to zero upon reaching the maximum value. The user should
ensure that the measurement period is less than the minimum length of time required for the counter to increment
2^32-1 times at the maximum frame rate. The user should store the value from the beginning of the measurement
period for later calculations, and take into account the possibility of a rollover occurring.
TXFRMC7
TXFRMC31
TXFRMC23
TXFRMC15
31
23
15
07
0
0
0
0
TXFRMC6
TXFRMC30
TXFRMC22
TXFRMC14
06
30
22
14
0
0
0
0
SU.TxFrmCtr
MAC All Frames Transmitted Counter
0300h (indirect)
TXFRMC5
TXFRMC29
TXFRMC21
TXFRMC13
05
29
21
13
0
0
0
0
TXFRMC4
TXFRMC28
TXFRMC20
TXFRMC12
135 of 167
04
28
20
12
0
0
0
0
TXFRMC3
TXFRMC27
TXFRMC19
TXFRMC11
03
27
19
11
0
0
0
0
TXFRMC2
TXFRMC26
TXFRMC18
TXFRMC10
02
26
18
10
0
0
0
0
TXFRMC1
TXFRMC9
TXFRMC25
TXFRMC17
01
25
17
09
0
0
0
0
TXFRMC0
TXFRMC8
TXFRMC24
TXFRMC16
00
24
16
08
0
0
0
0
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