DS33Z41 Maxim Integrated Products, DS33Z41 Datasheet - Page 120

• Manufacturer Part Number: DS33Z41
• Description: Network Controller & Processor ICs Quad Inverse-Multipl exing Ethernet Mappe
• Manufacturer: Maxim Integrated Products

Specifications of DS33Z41

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: Missed Frame (MF). This bit is set to 1 if the packet is not successfully received from the MAC by the
packet Arbiter.
Bit 4: Broadcast Frame (BF). This bit is set to 1 if the current frame is a broadcast frame.
Bit 3: Multicast Frame (MCF). This bit is set to 1 if the current frame is a multicast frame.
Bit 2: Unsupported Control Frame (UF). This bit is set to 1 if the frame received is a control frame with an
opcode that is not supported. If the Control Frame bit is set, and the Unsupported Control Frame bit is clear, then
a pause frame has been received and the transmitter is paused.
Bit 1: Control Frame (CF). This bit is set to 1 when the current frame is a control frame. This bit is only valid in
full-duplex mode.
Bit 0: Length Error (LE). This bit is set to 1 when the frames length field and the actual byte count are unequal.
This bit is only valid for 802.3 frames.
MF
7
0
—
6
0
SU.RFSB3
Receive Frame Status Byte 3
157h
—
5
0
120 of 167
BF
4
0
MCF
3
0
UF
2
0
CF
1
0
LE
0
0