ISP1362BDFA ST-Ericsson Inc, ISP1362BDFA Datasheet - Page 83

• Manufacturer Part Number: ISP1362BDFA
• Description: IC USB OTG CONTROLLER 64-LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1362BDFA

• Controller Type: USB 2.0 Controller
• Interface: Parallel/Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 568-1219; ISP1362BD,151; ISP1362BD-S

NXP Semiconductors
Table 57.
ISP1362_5
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcRhDescriptorB register: bit allocation
14.3.2 HcRhDescriptorB register (R/W: 13h/93h)
31
23
15
7
-
-
-
-
-
-
-
-
Table 56.
The HcRhDescriptorB register is the second of two registers describing the characteristics
of the root hub. These fields are written during initialization to correspond to the system
implementation.
Code (Hex): 13 — read
Code (Hex): 93 — write
Bit
8
7 to 2
1 to 0
30
22
14
6
-
-
-
-
-
-
-
-
Symbol
PSM
-
NDP[1:0] NumberofDownstreamPort: These bits specify the number of downstream
HcRhDescriptorA register: bit description
Table 57
reserved
reserved
29
21
13
Description
PowerSwitchingMode: This bit is used to specify how the power switching
of Root Hub ports is controlled. It is implementation specific. This field is
valid only if the NoPowerSwitching (NPS) field is cleared.
0 — All ports are powered at the same time.
1 — Each port is individually powered. This mode allows port power to be
controlled by either the global switch or per-port switching. If the
PortPowerControlMask (PPCM) bit is set, the port responds to only port
power commands (Set/ClearPortPower). If the port mask is cleared, then the
port is controlled only by the global power switch (Set/ClearGlobalPower).
reserved
ports supported by the root hub. The ISP1362 supports two ports and
therefore, the value is 2.
5
-
-
-
-
-
-
-
-
Rev. 05 — 8 May 2007
shows the bit allocation of the register.
28
20
12
4
-
-
-
-
-
-
-
-
reserved
reserved
27
19
11
3
-
-
-
-
-
-
-
-
…continued
Single-chip USB OTG Controller
R/W
R/W
26
18
10
2
-
-
-
-
PPCM[2:0]
DR[2:0]
R/W
R/W
25
17
IS
IS
9
1
-
-
-
-
© NXP B.V. 2007. All rights reserved.
ISP1362
R/W
R/W
82 of 152
24
16
8
0
-
-
-
-