ISP1362BDFA ST-Ericsson Inc, ISP1362BDFA Datasheet - Page 93

• Manufacturer Part Number: ISP1362BDFA
• Description: IC USB OTG CONTROLLER 64-LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1362BDFA

• Controller Type: USB 2.0 Controller
• Interface: Parallel/Serial
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 568-1219; ISP1362BD,151; ISP1362BD-S

NXP Semiconductors
Table 69.
ISP1362_5
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Hc PInterrupt register: bit allocation
INTL_IRQ
R/W
15
7
0
-
-
Table 70.
Bit
15 to 10
9
8
7
6
5
4
3
ClkReady
R/W
14
6
0
-
-
Symbol
-
OTG_IRQ
ATL_IRQ
INTL_IRQ
ClkReady
HC
Suspended
OPR_Reg
AllEOT
Interrupt
Hc PInterrupt register: bit description
Suspended
R/W
HC
13
5
0
-
-
Description
reserved
0 — no event
1 — The OTG interrupt event must read the OtgInterrupt register to get
the cause of the interrupt.
0 — no event
1 — Count value of the HcATLPTDDoneThresholdCount register or the
time-out value of the HcATLPTDDoneThresholdTimeOut register has
reached. The microprocessor is required to read HcATLPTDDoneMap to
check the PTDs that have completed their transactions.
0 — no event
1 — The Host Controller has detected the last PTD, and there is at least
one interrupt transaction that has received ACK from the device. The
microprocessor is required to read HcINTLPTDDoneMap to check the
PTDs that have received ACK from the device.
0 — no event
1 — The Host Controller has awakened from the ‘suspend’ state, and its
internal clock has turned on again.
0 — no event
1 — The Host Controller has been suspended and no USB activities are
sent from the microprocessor for each ms. The microprocessor can
suspend the Host Controller by setting bits 6 and 7 of the HcControl
register to logic 1. Once the Host Controller is suspended, no SOF needs
to be sent to the devices connected to downstream ports.
0 — no event
1 — A Host Controller operation has caused a hardware interrupt. It is
necessary for the HCD to read the HcInterruptStatus register to determine
the cause of the interrupt.
0 — no event
1 — Data transfer has been completed by using the PIO transfer or the
DMA transfer. This bit is set either when the value of the
HcTransferCounter register has reached zero, or the EOT pin of the Host
Controller is triggered by an external signal.
reserved
Rev. 05 — 8 May 2007
OPR_Reg
R/W
12
4
0
-
-
Interrupt
AllEOT
R/W
11
3
0
-
-
ISTL1_
Single-chip USB OTG Controller
R/W
INT
10
2
0
-
-
OTG_IRQ
ISTL0_
R/W
R/W
INT
9
0
1
0
© NXP B.V. 2007. All rights reserved.
ISP1362
SOF_INT
ATL_IRQ
R/W
R/W
92 of 152
8
0
0
0