Z16C3516VSG Zilog, Z16C3516VSG Datasheet - Page 237

• Manufacturer Part Number: Z16C3516VSG
• Description: IC 16MHZ Z8500 CMOS ISCC 68-PLCC
• Manufacturer: Zilog
• Series: IUSC™r

Specifications of Z16C3516VSG

• Controller Type: Serial Communications Controller (SCC)
• Interface: USB
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 50mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 68-LCC (J-Lead)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4690-5; Z16C3516VSG

UM011001-0601
0000027c d3e8
0000027e 3e6b
00000280 d3e8
00000282 0e08
00000284 cdWwww
00000287682 l6:
00000287 3aWwww
0000028a cb4f
0000028c 28f9
0000028e cb8f
00000290 32Wwww
00000293 3e03
00000295 d3e5
00000297 0602
00000299 21Wwww
0000029c 7e
0000029d d3e9
0000029f 23
000002a0 3ec0
000002a2 d3e8
000002a4 f3
000002a5 3e0a
000002a7 d3e8
000002a9 3ee8
000002ab d3e8
000002ad 3e00
000002af d3e8
000002b1 dbe8
000002b3 cb57
000002b5 28f6
000002b7717 txq1:
000002b7 7e
000002b8 d3e9
000002ba 23
660
661
662
663
664
665
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667
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708
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710
711
712 txq2:
713
714
715
716
718
719
720
721
Technical Considerations When Implementing LocalTalk Link Access Protocol
out
ld
out
ld
call
ld
bit
jr
res
ld
ld
out
ld
ld
ld
out
inc
ld
out
di
ld
out
ld
out
ld
out
in
bit
jr
ld
out
inc
(scc_cont),a
a,01101011b
(scc_cont),a
c,08h
bittime
a,(timflg)
1,a
z,l6
1,a
(timflg),a
a,03h
(ctc1_cont),a
b,02h
hl,txlapenq
a,(hl)
(scc_data),a
hl
a,0c0h
(scc_cont),a
a,0ah
(scc_cont),a
a,11101000b
(scc_cont),a
a,00h
(scc_cont),a
a,(scc_cont)
2,a
z,txq2
a,(hl)
(scc_data),a
hl
;sdlc crc,
;txcrc enable,
;reset rts
;**start counting out 2 flag character times **
;count 16 bit times
;from the rs-422 enable
;for 2 flags.
;btdelay=subr delay+ctc1int+polling=8bits
;16 bit times-btdelay=16-8=08h
;
;bittime delay
;is stored in reg.c
;and bit1 of timflg
;will indicate
;count termination.
;timer flag
;
;if bit1=1 then
;count terminated
;
;reset timflg bit1
;update timflg
;
;disable int,
;software reset
;to kill the counter1
;2+1 bytes to transmitted
;point to txlapenq buffer
;send 1st byte
;
;and send it
;point to the next byte
;reset eom latch command
;
;disable all int
;select WR10
;idle with 1’s
;at the end of the frame
;
;rr0
;read rr0
;read tx buffer empty
;loop if zero
;
;and send it
;point to the next byte
;
;
;
;
Application Note
14-11
1