MC68HC705X32CFU Freescale Semiconductor, MC68HC705X32CFU Datasheet - Page 115

• Manufacturer Part Number: MC68HC705X32CFU
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC705X32CFU

• Cpu Family: HC05
• Device Core Size: 8b
• Frequency (max): 4MHz
• Interface Type: SCI
• Program Memory Type: EPROM
• Program Memory Size: 32KB
• Total Internal Ram Size: 528Byte
• # I/os (max): 32
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: PQFP
• Lead Free Status / Rohs Status: Supplier Unconfirmed

LBCL – Last bit clock
This bit allows the user to select whether the clock associated with the last data bit transmitted
(MSB) has to be output to the SCLK pin. The clock of the last data bit is output to the SCLK pin if
the LBCL bit is a logic one, and is not output if it is a logic zero.
The last bit is the 8th or 9th data bit transmitted depending on the 8 or 9 bit format selected by M-bit
(seeTable
This bit should not be manipulated while the transmitter is enabled.
MC68HC05X16
(CPOL = 0, CPHA = 0)
(CPOL = 0, CPHA = 1)
(CPOL = 1, CPHA = 0)
(CPOL = 1, CPHA = 1)
clock
clock
clock
clock
data
Idle or preceding
transmission
7-2).
Freescale Semiconductor, Inc.
For More Information On This Product,
Start
Start
Figure 7-10 SCI data clock timing diagram (M=1)
Data format
SERIAL COMMUNICATIONS INTERFACE
LSB
8 bit
8 bit
9 bit
9 bit
0
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Table 7-2 SCI clock on SCLK pin
1
M-bit
0
0
1
1
2
M = 1 (9 data bits)
LBCL bit
3
0
1
0
1
*
LBCL bit controls last data clock
4
Number of clocks on
5
SCLK pin
7
8
8
9
6
MSB
7
Stop
*
*
8
*
*
Stop
Idle or next
transmission
7-13
7