MC68HC705X32CFU Freescale Semiconductor, MC68HC705X32CFU Datasheet - Page 47

• Manufacturer Part Number: MC68HC705X32CFU
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC705X32CFU

• Cpu Family: HC05
• Device Core Size: 8b
• Frequency (max): 4MHz
• Interface Type: SCI
• Program Memory Type: EPROM
• Program Memory Size: 32KB
• Total Internal Ram Size: 528Byte
• # I/os (max): 32
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: PQFP
• Lead Free Status / Rohs Status: Supplier Unconfirmed

CAF — MCAN asleep flag
This flag is set by the MCU when the MCAN module enters SLEEP mode. This is the only
indication that the MCAN is asleep (see
ECLK — External clock option bit
See
E1ERA — EEPROM erase/programming bit
Providing the E1LAT and E1PGM bits are at logic one, this bit indicates whether the access to the
EEPROM is for erasing or programming purposes.
Once the program/erase EEPROM address has been selected, E1ERA cannot be changed.
E1LAT — EEPROM programming latch enable bit
STOP, power-on and external reset clear the E1LAT bit.
Note:
E1PGM — EEPROM charge pump enable/disable
When the charge pump generator is on, the resulting high voltage is applied to the EEPROM array.
This bit cannot be set before the data is selected, and once this bit has been set it can only be
cleared by clearing the E1LAT bit.
A summary of the effects of setting/clearing bits 0, 1 and 2 of the control register are give in
Note:
MC68HC05X16
Section 4.3
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
After the t
to zero in order to clear the E1ERA bit and the E1PGM bit.
Not all combinations are shown in
cleared when the E1LAT bit is at zero, resulting in a read condition.
Freescale Semiconductor, Inc.
for a description of this bit.
–
–
–
–
ERA1
For More Information On This Product,
program or erase operations, providing the E1PGM bit is cleared.
bit are reset to zero when E1LAT is ‘0’.
The MCAN module is in SLEEP mode.
The MCAN module is not in SLEEP mode.
An erase operation will take place.
A programming operation will take place.
Address and data can be latched into the EEPROM for further
Data can be read from the EEPROM. The E1ERA bit and the E1PGM
Internal charge pump generator switched on.
Internal charge pump generator switched off.
erase time or t
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MEMORY AND REGISTERS
Section
PROG1
Table
programming time, the E1LAT bit has to be reset
5.5). The bit is cleared when the MCAN wakes up.
3-1, since the E1PGM and E1ERA bits are
Table
3-1.
3-5
3