MC68HC705X32CFU Freescale Semiconductor, MC68HC705X32CFU Datasheet - Page 12

• Manufacturer Part Number: MC68HC705X32CFU
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC705X32CFU

• Cpu Family: HC05
• Device Core Size: 8b
• Frequency (max): 4MHz
• Interface Type: SCI
• Program Memory Type: EPROM
• Program Memory Size: 32KB
• Total Internal Ram Size: 528Byte
• # I/os (max): 32
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: PQFP
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Paragraph
Number
6.4
6.4.1
6.4.2
6.4.3
6.5
6.5.1
6.6
6.7
6.8
7.1
7.2
7.3
7.4
7.5
7.6
7.6.1
7.6.2
7.7
7.8
7.9
7.10
7.11
7.11.1
7.11.2
7.11.3
7.11.4
7.11.5
7.12
7.13
7.14
8.1
8.2
8.3
8.4
Output compare..................................................................................................... 6-9
Pulse length modulation (PLM) ............................................................................. 6-11
Timer during STOP mode ..................................................................................... 6-12
Timer during WAIT mode ...................................................................................... 6-12
Timer state diagrams............................................................................................. 6-12
SCI two-wire system features................................................................................ 7-1
SCI receiver features............................................................................................. 7-3
SCI transmitter features......................................................................................... 7-3
Functional description ........................................................................................... 7-3
Data format............................................................................................................ 7-5
Receiver wake-up operation.................................................................................. 7-5
Receive data in (RDI) ............................................................................................ 7-6
Start bit detection .................................................................................................. 7-6
Transmit data out (TDO)........................................................................................ 7-8
SCI synchronous transmission.............................................................................. 7-9
SCI registers.......................................................................................................... 7-10
Baud rate selection................................................................................................ 7-20
SCI during STOP mode......................................................................................... 7-21
SCI during WAIT mode.......................................................................................... 7-21
Miscellaneous register........................................................................................... 8-3
PLM clock selection............................................................................................... 8-4
PLM during STOP mode ....................................................................................... 8-4
PLM during WAIT mode ........................................................................................ 8-4
Output compare register 1 (OCR1) ................................................................. 6-9
Output compare register 2 (OCR2) ................................................................. 6-10
Software force compare................................................................................... 6-11
Pulse length modulation registers A and B (PLMA/PLMB).............................. 6-11
Idle line wake-up.............................................................................................. 7-6
Address mark wake-up .................................................................................... 7-6
Serial communications data register (SCDR) .................................................. 7-10
Serial communications control register 1 (SCCR1) ......................................... 7-10
Serial communications control register 2 (SCCR2) ......................................... 7-14
Serial communications status register (SCSR) ............................................... 7-16
Baud rate register (BAUD) ............................................................................... 7-18
Freescale Semiconductor, Inc.
SERIAL COMMUNICATIONS INTERFACE
For More Information On This Product,
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Go to: www.freescale.com
TABLE OF CONTENTS
TITLE
7
8
MC68HC05X16
Number
Rev. 1
Page