MC68HC705X32CFU Freescale Semiconductor, MC68HC705X32CFU Datasheet - Page 74

MC68HC705X32CFU

Manufacturer Part Number
MC68HC705X32CFU
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC705X32CFU

Cpu Family
HC05
Device Core Size
8b
Frequency (max)
4MHz
Interface Type
SCI
Program Memory Type
EPROM
Program Memory Size
32KB
Total Internal Ram Size
528Byte
# I/os (max)
32
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
8-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
PQFP
Lead Free Status / Rohs Status
Supplier Unconfirmed

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC705X32CFU4
Manufacturer:
FREESCALE
Quantity:
20 000
5
5.3.4
All bits of this register are read only; all are cleared by a read of the register.
This register must be read in the interrupt handling routine in order to enable further interrupts.
WIF — Wake-up interrupt flag
If the MCAN detects bus activity whilst it is asleep, it clears the SLEEP bit in the CCOM register;
the WIF bit will then be set. WIF is cleared by reading the MCAN interrupt register (CINT), or by
an external reset.
OIF — Overrun interrupt flag
When OIE is set then this bit will be set when a data overrun condition is detected. Like all the bits
in this register, OIF is cleared by reading the register, or when reset request is set.
EIF — Error interrupt flag
When EIE is set then this bit will be set by a change in the error or bus status bits in the MCAN
status register. Like all the bits in this register, EIF is cleared by reading the register, or by an
external reset.
TIF — Transmit interrupt flag
The TIF bit is set at the end of a transmission whenever both the TBA and TIE bits are set. Like all
the bits in this register, TIF is cleared by reading the register, or when reset request is set.
MCAN interrupt
(CINT)
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
1 (set)
0 (clear) –
MCAN interrupt register (CINT)
Address
$0023
Freescale Semiconductor, Inc.
MCAN has detected activity on the bus and requested wake-up.
No wake-up interrupt has occurred.
A data overrun has been detected.
No data overrun has occurred.
There has been a change in the error or bus status bits in CSTAT.
No error interrupt has occurred.
Transmission complete, the transmit buffer is accessible.
No transmit interrupt has occurred.
bit 7
For More Information On This Product,
MOTOROLA CAN MODULE (MCAN)
bit 6
Go to: www.freescale.com
bit 5
bit 4
WIF
bit 3
OIF
bit 2
EIF
bit 1
TIF
bit 0
RIF
Reset condition
External reset - - - 0 0000
RR bit set
MC68HC05X16
- - - u 0u00
on reset
State
Rev. 1

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