MC68HC705X32CFU Freescale Semiconductor, MC68HC705X32CFU Datasheet - Page 198

MC68HC705X32CFU

Manufacturer Part Number
MC68HC705X32CFU
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC705X32CFU

Cpu Family
HC05
Device Core Size
8b
Frequency (max)
4MHz
Interface Type
SCI
Program Memory Type
EPROM
Program Memory Size
32KB
Total Internal Ram Size
528Byte
# I/os (max)
32
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
8-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
PQFP
Lead Free Status / Rohs Status
Supplier Unconfirmed

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC705X32CFU4
Manufacturer:
FREESCALE
Quantity:
20 000
15
B.8
Oscillator divide-by-two is forced in bootstrap mode; all other options stay as programmed in the
mask options register (see
The bootstrap firmware is located in mask ROM at address locations $0200 to $024F, $03B0 to
$3FFF, $7E00 to $7FDD and $7FE0 to $7FEF. This firmware can be used to program the EPROM
and the EEPROM, to check if the EPROM is erased, or to load and execute routines in RAM.
After reset, while going to the bootstrap mode, the vector located at address $7FEE and $7FEF
(RESET) is fetched to start execution of the bootstrap program. To place the part in bootstrap
mode, the following conditions must be met during transition of the RESET pin from low to high:
The hold time on the IRQ, MDS, TCAP1 and TCAP2 pins is two clock cycles after the external
RESET pin is brought high.
When the MC68HC705X32 is placed in the bootstrap mode, the bootstrap reset vector will be
fetched and the bootstrap firmware will start to execute.
to enter each level of bootstrap mode on the rising edge of RESET .
The bootstrap program first copies part of itself into RAM (except ‘RAM parallel load’), as the
program cannot be executed in ROM during verification/programming of the EPROM.
x = Don’t care
MDS
V
V
V
V
V
V
V
DD
DD
DD
DD
DD
DD
SS
AND V
OR
OR
OR
OR
OR
OR
1) IRQ pin at 2xV
2) TCAP1 pin at V
3) TCAP2 pin at V
SS
2V
2V
2V
2V
2V
2V
IRQ
Bootstrap mode
to V
DD
DD
DD
DD
DD
DD
DD
Freescale Semiconductor, Inc.
V
SS
TCAP1
V
V
V
V
V
V
to V
DD
DD
DD
DD
DD
DD
DD
For More Information On This Product,
DD
SS
DD
Section
Table B-5 Mode of operation selection
or MDS pin at V
TCAP2 PD1 PD2 PD3 PD4
V
V
V
V
V
V
x
SS
SS
SS
SS
SS
SS
Go to: www.freescale.com
B.7).
0
1
0
1
x
x
x
MC68HC705X32
x
0
0
1
1
1
x
DD
0
0
0
0
1
1
x
x
x
x
x
x
0
1
Single-chip mode
Bootstrap mode:
EPROM erase check
EPROM erase check, erase EEPROM, parallel
EPROM/EEPROM program/verify
Parallel EEPROM only verify (SEC bit not active)
EPROM erase check, erase EEPROM, parallel EPROM
only program/verify
Jump to RAM $0051 (SEC bit not active)
Serial RAM load and execute (SEC bit not active)
Table B-5
shows the conditions required
Mode
MC68HC05X16
Rev. 1

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