MC68HC705X32CFU Freescale Semiconductor, MC68HC705X32CFU Datasheet - Page 75

• Manufacturer Part Number: MC68HC705X32CFU
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC705X32CFU

• Cpu Family: HC05
• Device Core Size: 8b
• Frequency (max): 4MHz
• Interface Type: SCI
• Program Memory Type: EPROM
• Program Memory Size: 32KB
• Total Internal Ram Size: 528Byte
• # I/os (max): 32
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: PQFP
• Lead Free Status / Rohs Status: Supplier Unconfirmed

RIF — Receive interrupt flag
The RIF bit is set by the MCAN when a new message is available in the receive buffer, and the RIE
bit in CCNTRL is set. At the same time RBS is set. Like all the bits in this register, RIF is cleared
by reading the register, or when reset request is set.
5.3.5
On reception each message is written into the current receive buffer. The MCU is only signalled to
read the message however, if it passes the criteria in the acceptance code and acceptance mask
registers (accepted); otherwise, the message will be overwritten by the next message (dropped).
Note:
AC7 – AC0 — Acceptance code bits
AC7 – AC0 comprise a user defined sequence of bits with which the 8 most significant bits of the
data identifier (ID10 – ID3) are compared. The result of this comparison is then masked with the
acceptance mask register. Once a message has passed the acceptance criterion the respective
identifier, data length code and data are sequentially stored in a receive buffer, providing there is
one free. If there is no free buffer, the data overrun condition will be signalled.
On acceptance the receive buffer status bit is set to full and the receive interrupt bit is set (provided
RIE = enabled).
MC68HC05X16
MCAN acceptance code (CACC)
1 (set)
0 (clear) –
This register can only be accessed when the reset request bit in the CCNTRL register
is set.
MCAN acceptance code register (CACC)
Freescale Semiconductor, Inc.
–
For More Information On This Product,
A new message is available in the receive buffer.
No receive interrupt has occurred.
Address
MOTOROLA CAN MODULE (MCAN)
$0024
Go to: www.freescale.com
bit 7
AC7
bit 6
AC6
AC5
bit 5
AC4
bit 4
bit 3
AC3
bit 2
AC2
bit 1
AC1
bit 0
AC0
Undefined
on reset
State
5-13
5