CN8236EBGB Mindspeed Technologies, CN8236EBGB Datasheet - Page 112
CN8236EBGB
Manufacturer Part Number
CN8236EBGB
Description
ATM SAR 155Mbps 3.3V ABR/CBR/GFR/UBR/VBR 388-Pin BGA
Manufacturer
Mindspeed Technologies
Datasheet
1.CN8236EBGB.pdf
(443 pages)
Specifications of CN8236EBGB
Package
388BGA
Traffic Class
ABR|CBR|GFR|UBR|VBR
Utopia Type
Level 1|Level 2
Host Interface
PCI
Maximum Data Rate
155 Mbps
Typical Operating Supply Voltage
3.3 V
Minimum Operating Supply Voltage
3 V
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5.0 Reassembly Coprocessor
5.2 Reassembly Functional Description
Figure 5-1. Reassembly—Basic Process Flow
5.2.1 Reassembly VCCs
5-2
Network
ATM
ATM Cells
5.2 Reassembly Functional Description
Each cell received from the ATM PHY Interface block belongs to any one of a
possible 64 K virtual channels, or simultaneous messages. Due to the
asynchronous nature of ATM, the cell contained in any incoming cell slot can
belong to any VCC. Thus, the reassembly coprocessor must assign each arriving
cell to the proper VCC, thereby de-multiplexing the incoming messages.
Figure 5-1
As with segmentation VCCs, the CN8236 supports up to 64 K reassembly VCCs,
referenced by VCC_INDEX, which identifies a location in the reassembly VCC
table.
single VC. Each VC can be processed as either AAL5, AAL3/4, or AAL0. AAL0
VCs can optionally be treated as Virtual FIFO buffers.
64 K VCC indexes, the actual number of reassembly VCCs allowed by the SAR is
limited by the amount of SAR-shared memory available in which to allocate and
create RSM VCC tables, free buffer queues, RSM status queues, etc.
Each entry in the reassembly VCC table consists of 12 words and describes a
While the CN8236 accepts any reassembly VCC index within the range of
Mindspeed Technologies
illustrates the basic reassembly process flow.
Coprocessor
Reassembly
ATM ServiceSAR Plus with xBR Traffic Management
™
Messages
(64 K)
28236-DSH-001-B
Host
CN8236
8236_020
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