CN8236EBGB Mindspeed Technologies, CN8236EBGB Datasheet - Page 377
CN8236EBGB
Manufacturer Part Number
CN8236EBGB
Description
ATM SAR 155Mbps 3.3V ABR/CBR/GFR/UBR/VBR 388-Pin BGA
Manufacturer
Mindspeed Technologies
Datasheet
1.CN8236EBGB.pdf
(443 pages)
Specifications of CN8236EBGB
Package
388BGA
Traffic Class
ABR|CBR|GFR|UBR|VBR
Utopia Type
Level 1|Level 2
Host Interface
PCI
Maximum Data Rate
155 Mbps
Typical Operating Supply Voltage
3.3 V
Minimum Operating Supply Voltage
3 V
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16.1.1 PCI Bus Interface Timing
Table 16-1. PCI Bus Interface Timing Parameters (1 of 2)
28236-DSH-001-B
Symbol
t
t
t
high
t
cyc
low
t
su
h
HCLK Cycle Time
HCLK High Time
HCLK Low Time
HAD Input Setup Time to HCLK
HC/BE Input Setup Time to HCLK
HPAR Input Setup Time to HCLK
HFRAME* Input Setup Time to HCLK
HIRDY* Input Setup Time to HCLK
HTRDY* Input Setup Time to HCLK
HSTOP* Input Setup Time to HCLK
HDEVSEL* Input Setup Time to HCLK
HIDSEL Input Setup Time to HCLK
HGNT* Input Setup Time to HCLK
HPERR* Input Setup Time to HCLK
Input Hold Time from HCLK–All Inputs
16.0 Electrical and Mechanical Specifications
16.1 Timing
All PCI bus interface signals are synchronous to the PCI bus clock, HCLK,
except for HRST* and HINT*.
parameters.
(1)
(1)
(1)
Parameter
Mindspeed Technologies
Figures 16-1
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
and
16-2
16
Table 16-1
illustrate this timing.
™
provides the PCI bus interface timing
Min
25
10
10
10
7
7
7
7
7
7
7
7
7
7
0
Max
—
15
15
—
—
—
—
—
—
—
—
—
—
—
—
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
16-1
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