CN8236EBGB Mindspeed Technologies, CN8236EBGB Datasheet - Page 347

• Manufacturer Part Number: CN8236EBGB
• Description: ATM SAR 155Mbps 3.3V ABR/CBR/GFR/UBR/VBR 388-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of CN8236EBGB

• Package: 388BGA
• Traffic Class: ABR|CBR|GFR|UBR|VBR
• Utopia Type: Level 1|Level 2
• Host Interface: PCI
• Maximum Data Rate: 155 Mbps
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3 V

CN8236
ATM ServiceSAR Plus with xBR Traffic Management
Table 14-4. 0x1c4—Host Processor Interrupt Status Register 1 (HOST_ISTAT1)
28236-DSH-001-B
28–27
23–16
9–3
Bit
31
30
29
26
25
24
15
14
13
12
11
10
2
1
0
Field
Size
1
1
1
2
1
1
1
8
1
1
1
1
1
1
7
1
1
1
Type
—
—
—
L
L
L
E
E
E
E
E
E
E
E
E
E
E
E
PCI_BUS_EROR
AALx_STAT
TX_DISCARD
Reserved
DMA_AFULL
FR_PAR_ERR
FR_SYNC_ERR
Reserved
RS_QUEUE_FULL
RSM_OVFL
RSM_HS_FULL
RSM_LS_FULL
RSM_HF_EMPT
RSM_LF_EMPT
Reserved
SEG_UNFL
SEG_HS_FULL
SEG_LS_FULL
Mindspeed Technologies
Name
This bit is set if the MERROR bit in the PCI configuration
register is set. The MERROR bit is reset by either writing a
logic 1 to the MERROR bit in the PCI configuration register,
or setting the CONFIG0(PCI_ERR_RESET) bit to a logic
high.
Whenever any bit in AALx_STAT is a logic 1, AALx_STAT is
a logic 1.
When any bit in TX_STATUS is a logic 1, TX_DISCARD is a
logic 1. TX_DISCARD is reset to 0 after the host reads the
TX_STATUS register.
Read as 0.
Set when the incoming DMA burst FIFO buffer becomes
almost full.
Set on the occurrence of a parity error on the reassembly
ATM physical interface.
Set on the occurrence of a synchronization error on the
reassembly ATM physical interface.
Read as 0.
Reassembly/segmentation queue full condition.
Reassembly overflow. Indicates that a cell was lost due to a
FIFO buffer full condition.
Set on the occurrence of a host status queue full condition.
Set on the occurrence of a local status queue full condition.
Set on the occurrence of a host free buffer queue empty
condition.
Set on the occurrence of a local free buffer queue empty
condition.
Read as 0.
Segmentation underflow indicates that a scheduled cell
could not be sent due to lack of PCI bandwidth.
Indicates that the segmentation host status queue is full.
Indicates that the segmentation local status queue is full.
™
Description
14.6 Counters and Status Registers
14.0 CN8236 Registers
14-31