CN8236EBGB Mindspeed Technologies, CN8236EBGB Datasheet - Page 324

• Manufacturer Part Number: CN8236EBGB
• Description: ATM SAR 155Mbps 3.3V ABR/CBR/GFR/UBR/VBR 388-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of CN8236EBGB

• Package: 388BGA
• Traffic Class: ABR|CBR|GFR|UBR|VBR
• Utopia Type: Level 1|Level 2
• Host Interface: PCI
• Maximum Data Rate: 155 Mbps
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3 V

14.0 CN8236 Registers
14.2 System Registers
0x1c
0x20
14-8
31–11
31–30
29–24
23–22
21–16
15-12
11–8
7–0
7–4
3–0
Bit
Bit
10
9
8
—
—
Interrupt Delay Register (INT_DELAY)
AALx Control Register (AALx_CTRL)
Field
Field
Size
Size
21
1
1
1
8
2
6
2
6
4
4
4
4
Reserved
TIMER_LOC
EN_TIMER
EN_STAT_CNT
STAT_CNT[7:0]
Reserved
RST_INGRESS_FIFO
Reserved
RST_EGRESS_FIFO
Reserved
INGRESS_DEPTH
Reserved
EGRESS_DEPTH
[5:0]
[5:0]
Name
Name
Mindspeed Technologies
Set to 0.
If logic high, interrupt hold-off timer used with local interrupt; else with host
interrupt.
Enable status queue interrupt timer delay.
Enable status queue interrupt counter delay.
Number of status queue entries written before allowing interrupt to
propagate to output pin.
Set to 0.
If logic high, resets the AALx ingress FIFO buffer shadow counter.
Set to 0.
If logic high, resets the AALx egress FIFO buffer shadow counter.
Set to 0.
Depth of all ingress FIFO buffers in terms of number of cells.
Actual depth = register value +1.
Set to 0.
Depth of all egress FIFO buffers in terms of number of cells.
Actual depth = register value +1.
ATM ServiceSAR Plus with xBR Traffic Management
™
Description
Description
28236-DSH-001-B
CN8236