CN8236EBGB Mindspeed Technologies, CN8236EBGB Datasheet - Page 79

• Manufacturer Part Number: CN8236EBGB
• Description: ATM SAR 155Mbps 3.3V ABR/CBR/GFR/UBR/VBR 388-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of CN8236EBGB

• Package: 388BGA
• Traffic Class: ABR|CBR|GFR|UBR|VBR
• Utopia Type: Level 1|Level 2
• Host Interface: PCI
• Maximum Data Rate: 155 Mbps
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3 V

28236-DSH-001-B
4.0 Segmentation Coprocessor
4.1 Overview
ATM’s cell transport mechanism enables large numbers of virtual channels or
VCCs to be multiplexed onto a single PHY interface. The segmentation process
converts user data (typically Ethernet, Token Ring, or Frame Relay packets) into
ATM cells.
coprocessor block independently segments each channel and multiplexes the
VCCs onto the line with cell level interleaving. The CN8236 xBR Traffic
Manager determines the order of execution of these independent processes to
ensure the requested QoS for every channel. For each cell transmission
opportunity, the xBR Traffic Manager tells the segmentation coprocessor which
VCC to send. Therefore, the segmentation coprocessor acts as a slave to the xBR
Traffic Manager.
generates all AAL overhead for AAL3/4 and AAL5, or optionally uses a null
adaptation layer, AAL0. The CN8236 also generates the ATM cell header, as
defined by the host, for each VCC. Furthermore, the segmentation coprocessor
and xBR Traffic Manager together provide service-specific features to enhance
the performance of Frame Relay internetworking and LAN Emulation.
The CN8236 can segment 64 K VCCs simultaneously. The segmentation
In addition to converting blocked user data into ATM cells, the CN8236
Mindspeed Technologies
4
™
4-1