CN8236EBGB Mindspeed Technologies, CN8236EBGB Datasheet - Page 84
CN8236EBGB
Manufacturer Part Number
CN8236EBGB
Description
ATM SAR 155Mbps 3.3V ABR/CBR/GFR/UBR/VBR 388-Pin BGA
Manufacturer
Mindspeed Technologies
Datasheet
1.CN8236EBGB.pdf
(443 pages)
Specifications of CN8236EBGB
Package
388BGA
Traffic Class
ABR|CBR|GFR|UBR|VBR
Utopia Type
Level 1|Level 2
Host Interface
PCI
Maximum Data Rate
155 Mbps
Typical Operating Supply Voltage
3.3 V
Minimum Operating Supply Voltage
3 V
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4.0 Segmentation Coprocessor
4.2 Segmentation Functional Description
Figure 4-3. Before SAR Transmit Queue Entry Processing
4-6
SAR Transmit Queue
HOST WRITE
(VLD = 1)
Processing
SEG VCC Table Entry (VCC_INDEX = 4)
Transmit Queue Entry
1
buffer descriptor chain to the VCC table entry identified by the VCC_INDEX in
the first SBD. The VCC table entry includes pointers to buffer descriptors for
segmentation. The SAR links the new SBDs to the current chain of SBDs on a
VCC. The host can submit data to a VCC while the SAR is segmenting a
previously submitted message. Once the chain has been linked, the CN8236 resets
the transmit queue VLD bit to 0.
Figures 4-3
NOTE:
CURR_DESCR
LAST_DESCR
VCC STATE
In either case, the SAR services one transmit queue entry by linking the new
BD_PNTR
As the new buffers are submitted, the VCC is processing a single buffer
PDU (BOM/EOM). The CN8236 accepts new PDUs while it is processing
outstanding buffers.
Mindspeed Technologies
and
4-4
illustrate the process of linking SBDs to a VCC table entry.
ATM ServiceSAR Plus with xBR Traffic Management
™
BUFF_PNTR = &C
BUFF_PNTR = &A
BUFF_PNTR = &B
BUFF_PNTR = &Z
VCC_INDEX = 4
VCC_INDEX = 4
VCC_INDEX = 4
VCC_INDEX = 4
<BOM/EOM>
CONTROL
CONTROL
CONTROL
CONTROL
(NULL)
(NULL)
<COM>
<BOM>
<EOM>
NEXT
NEXT
NEXT
NEXT
SBDs
28236-DSH-001-B
CN8236
8236_014
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