CN8236EBGB Mindspeed Technologies, CN8236EBGB Datasheet - Page 180

• Manufacturer Part Number: CN8236EBGB
• Description: ATM SAR 155Mbps 3.3V ABR/CBR/GFR/UBR/VBR 388-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of CN8236EBGB

• Package: 388BGA
• Traffic Class: ABR|CBR|GFR|UBR|VBR
• Utopia Type: Level 1|Level 2
• Host Interface: PCI
• Maximum Data Rate: 155 Mbps
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3 V

6.0 Traffic Management
6.2 xBR Cell Scheduler Functional Description
Figure 6-5. Schedule Slot Formats With USE_SCH_CTRL Asserted
6-12
6.2.2.4 Schedule Slot
NOTE(S):
(1)
(PRI=VBR_OFFSET+2)
(PRI=VBR_OFFSET+4)
VBR_OFFSET would be set to 0 for these Schedule Slot formats.
= User Defined
VCC_Index
VCC_Index
VCC_Index
VCC_Index
VBR/ABR
VBR/ABR
VBR/ABR
USE_SCH_CTRL
(PRI=14)
CBR
Formats with
Asserted
(1)
CBR_TUN = 1
(PRI=VBR_OFFSET+1)
(PRI=VBR_OFFSET+3)
(PRI=VBR_OFFSET+5)
VCC_Index
VCC_Index
VCC_Index
VCC_Index
VBR/ABR
VBR/ABR
VBR/ABR
VBR/ABR
When USE_SCH_CTRL is asserted, the SLOT_DEPTH and VBR_OFFSET
fields in the SCH_CTRL register and the CBR_TUN field in the SEG_CTRL
register dictate the format of each schedule slot. This format is illustrated in
Figure
(PRI=15)
6-5.
(1)
Mindspeed Technologies
SLOT_DEPTH = 000
SLOT_DEPTH = 001
SLOT_DEPTH = 010
SLOT_DEPTH = 111
ATM ServiceSAR Plus with xBR Traffic Management
(PRI=VBR_OFFSET+0)
(PRI=VBR_OFFSET+2)
(PRI=VBR_OFFSET+4)
™
VCC_Index
VCC_Index
VCC_Index
VCC_Index
VBR/ABR
VBR/ABR
VBR/ABR
VBR/ABR
(PRI=14)
CBR_TUN = 0
(1)
(PRI=VBR_OFFSET+1)
(PRI=VBR_OFFSET+3)
(PRI=VBR_OFFSET+5)
28236-DSH-001-B
VCC_Index
VCC_Index
VCC_Index
VCC_Index
VBR/ABR
VBR/ABR
VBR/ABR
VBR/ABR
(PRI=15)
(1)
CN8236
8236_108