CN8236EBGB Mindspeed Technologies, CN8236EBGB Datasheet - Page 37

• Manufacturer Part Number: CN8236EBGB
• Description: ATM SAR 155Mbps 3.3V ABR/CBR/GFR/UBR/VBR 388-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of CN8236EBGB

• Package: 388BGA
• Traffic Class: ABR|CBR|GFR|UBR|VBR
• Utopia Type: Level 1|Level 2
• Host Interface: PCI
• Maximum Data Rate: 155 Mbps
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3 V

CN8236
ATM ServiceSAR Plus with xBR Traffic Management
Figure 2-1. Multiple Client Architecture Supports Up To 32 Clients
2.2.2 CN8236 Queue Structure
28236-DSH-001-B
PCI Motherboard
PCI Cards
Logical
Physical
Physical
Logical
Client
Client
Client
Client
The flow of the reassembly, scheduling, and segmentation processes in the
CN8236 is monitored, coordinated, and controlled through the use of a full array
of circular queues, serviced by the CN8236 or the host.
descriptors to the CN8236 for segmentation. The segmentation coprocessor then
processes these transmit queue entries as part of the segmentation function.
coprocessor and read by the segmentation coprocessor. The queue includes data
on OAM-PM cells to be transmitted and as data on ABR-class received
Backward_RM and Forward_RM cells. The RSM/SEG queue is a private queue
for the SAR that the host cannot read or write.
The following queues exist in local memory:
• Transmit queues (up to 32 queues)
• Reassembly/segmentation queue
• Free buffer queues (up to 32 queues)—includes the Global OAM free
Figure 2-2
Transmit queues are used by the host to submit chains of segmentation buffer
The reassembly/segmentation queue is written to by the reassembly
buffer queue.
Mindspeed Technologies
illustrates the location of each queue.
LEGEND:
2.2 High Performance Host Architecture with Buffer Isolation
CN8236 Subsystem
ATM Server
™
Host Data Path
Host Control/Status Flow
2.0 Architecture Overview
ATM
User-Network
Interface
8236_002
2-3