CN8236EBGB Mindspeed Technologies, CN8236EBGB Datasheet - Page 89

• Manufacturer Part Number: CN8236EBGB
• Description: ATM SAR 155Mbps 3.3V ABR/CBR/GFR/UBR/VBR 388-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of CN8236EBGB

• Package: 388BGA
• Traffic Class: ABR|CBR|GFR|UBR|VBR
• Utopia Type: Level 1|Level 2
• Host Interface: PCI
• Maximum Data Rate: 155 Mbps
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3 V

CN8236
ATM ServiceSAR Plus with xBR Traffic Management
Figure 4-6. AAL3/4 CPCS-PDU Generation
28236-DSH-001-B
Segmentation (SAR-PDU)
NOTE(S):
1. CPI = Common Part Indicator. In AAL3/4, initially set to all Os.
2. Btag = Beginning Tag. Has the same identifying number as the Etag field. When the receiver reassembles a long PDU,
3. BASIZE = Buffer Allocation Size. Tells the receiver how large the buffer allocation must be to receive and reassemble
4. AL = Aligns the trailer to fit a 4-byte word.
5. Etag = Ending Tag (see Btag above).
6. Length = Contains the exact size of the PDU's payload.
H ST SN MID Information
Convergence Sublayer (CPCS-PDU)
these tags help identify that cells are from the same PDU.
this PDU.
INTERFACE
PHY
4.2.3.3 AAL0
CPI Btag BASIZE
(1-9 Cells)
TX_FIFO
(44 Bytes)
Header
LI CRC
The CN8236 also supports a transparent or NULL adaptation layer, AAL0. AAL0
maps CPCS-SDUs directly to CPCS-PDU payloads. The SAR pads the SDU to a
48-byte cell payload boundary, but generates no other overhead. The SAR
generates the ATM header and PDU termination indications in the same manner
as it does with AAL5.
Seqmented
(To Each
Cell)
Figure 4-6
Byte Length Counter
CRC Accumulator
H ST SN MID
Mindspeed Technologies
Internal
Circuits
shows the CN8236’s AAL3/4 PDU generation scheme.
Payload
<64 K
LI CRC
SEG VCC Table Entry
™
ATM_ HEADER
PDU_LEN
4.2 Segmentation Functional Description
BETAG
H ST SN MID
MID
SN
Seqmentented
4.0 Segmentation Coprocessor
(To Each
Cell)
PAD
AL
Etag
Trailer
Pad
Length
LI CRC
8236_094
4-11