ort8850 Lattice Semiconductor Corp., ort8850 Datasheet - Page 102

• Manufacturer Part Number: ort8850
• Description: Field-programmable System Chip Fpsc Eight-channel X 850 Mbits/s Backplane Transceiver
• Manufacturer: Lattice Semiconductor Corp.

Lattice Semiconductor
Package Parasitics
The electrical performance of an IC package, such as signal quality and noise sensitivity, is directly affected by the
package parasitics. Table 39 lists eight parasitics associated with the ORCA packages. These parasitics represent
the contributions of all components of a package, which include the bond wires, all internal package routing, and
the external leads.
Four inductances in nH are listed: L
inductance to the nearest neighbor lead. These parameters are important in determining ground bounce noise and
inductive crosstalk noise. Three capacitances in pF are listed: C
est neighbor lead; and C
to be grounded). These parameters are important in determining capacitive crosstalk and the capacitive loading
effect of the lead. Resistance values are in mΩ.
The parasitic values in Table 39 are for the circuit model of bond wire and package lead parasitics. If the mutual
capacitance value is not used in the designer’s model, then the value listed as mutual capacitance should be
added to each of the C
Table 39. ORCA ORT8850 Package Parasitics
Figure 39. Package Parasitics
Package Outline Diagrams
Terms and Definitions
Basic Size (BSC): The basic size of a dimension is the size from which the limits for that dimension are derived by
the application of the allowance and the tolerance.
Design Size: The design size of a dimension is the actual size of the design, including an allowance for fit and tol-
erance.
Typical (TYP): When specified after a dimension, this indicates the repeated design size if a tolerance is specified
or repeated basic size if a tolerance is not specified.
Reference (REF): The reference dimension is an untoleranced dimension used for informational purposes only. It
is a repeated dimension or one that can be derived from other values in the drawing.
Minimum (MIN) or Maximum (MAX): Indicates the minimum or maximum allowable size of a dimension.
680-Pin PBGAM
Package Type
1
and C
1
PAD N + 1
and C
L
3.8
SW
PAD N
Package
Pads
2
capacitors.
2
, the total capacitance of the lead to all other leads (all other leads are assumed
SW
L
1.3
MW
L
and L
L
L
MW
SW
SW
C
M
SL,
R
R
the self-inductance of the lead; and L
250
R
W
W
W
102
C
C
1
1
L
1.0
C
L
L
ML
SL
SL
1
M
, the mutual capacitance of the lead to the near-
C
C
1.0
C
2
2
2
Circuit
Board Pads
ORCA ORT8850 Data Sheet
Pad N+1
Pad N
C
0.3
M
MW
and L
2.8 - 5.0
L
SL
ML
, the mutual
0.5 - 1.0
L
ML