ort8850 Lattice Semiconductor Corp., ort8850 Datasheet - Page 13

• Manufacturer Part Number: ort8850
• Description: Field-programmable System Chip Fpsc Eight-channel X 850 Mbits/s Backplane Transceiver
• Manufacturer: Lattice Semiconductor Corp.

Lattice Semiconductor
Figure 3. Top Level Block Diagram ORT8850 Embedded Core SONET Logic Block Common Signals and
Channel AA Data Flow
Each quad can frame independently in STS-3, STS-12 or STS-48 format. If using STS-48 format all channels in the
quad will be used and be treated as a single STS-48 channel using the quad STS-12 format in which each inde-
pendent channel carries entire STS-12 frames. The byte order for STS-48 must be created by the designer in the
FPGA design. Note that the recovered data will always continue to be in the same order as transmitted data.
Each channel contains transmit path and receive path logic, both of which are organized around High Speed Inter-
connect (HSI) and Synchronous Transport Mode (STM) macrocells. Additional logic allows insertion and extraction
of information in the Transport Overhead area of the SONET frame. (Support for loopback and for switching
between redundant serial links is also provided but is not shown in Figure 3). The following sections will give an
overview of the pseudo-SONET protocol supported by the ORT8850 and a top level overview of the Synchronous
Transport Module (STM) and High Speed Interconnect (HSI) macrocells, which provide the SONET functionality.
Note: Signals
asterisk only
used in TOH
marked with
Insert Mode
FPGA
Logic
*RX_TOH_CK_EN
*TX_TOH_CK_EN
*TOH_CK_LP_EN
FPGA_SYSCLK
DOUTAA_C1J1
DOUTAA_PAR
DOUTAA _SPE
CDR_CLK_AA
*TOH_OUTAA
*TOH_AA _EN
DOUTAA _EN
*RX_TOH_FP
DOUTAA[7:0]
DOUTAA _FP
DINAA_PAR
*TOH_InAA
*TOH_CLK
DINAA[7:0]
LINE_FP
SYS_FP
Processing
TX STM Block
TOH Insertion Block
Pointer
RX STM Block
TOH Extraction
4:1 MUX
Block
(x8)
Channel
SONET Logic Blocks
Descrambler
Multi-
Align
Common Signals
Channel AB
Channel BD
13
.
.
.
TOH Functions, Ch. AA
RX HSI Block
TX HSI Block
Transmit, Ch. AA
Receive, Ch. AA
RX Serial
TX Serial
System
Clock
Data
Data
ORCA ORT8850 Data Sheet
Note: xx = AA, ..., BD
I/O DEMUX
I/O MUX,
Buffers
LVDS
and
SYS_CLK_[P:N]
RXDxx_W_[P:N]
RXDxx_P_[P:N]
TXDxx_W_[P:N]
TXDxx_P_[P:N]
Package
Signals
Pins
on