ort8850 Lattice Semiconductor Corp., ort8850 Datasheet - Page 11
ort8850
Manufacturer Part Number
ort8850
Description
Field-programmable System Chip Fpsc Eight-channel X 850 Mbits/s Backplane Transceiver
Manufacturer
Lattice Semiconductor Corp.
Datasheet
1.ORT8850.pdf
(105 pages)
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Lattice Semiconductor
ORT8850 Overview
The ORT8850 FPSCs provide high-speed backplane transceivers combined with FPGA logic. There are two
devices in the ORT8850 family. The ORT8850L device is based on 1.5 V OR4E02 ORCA FPGA and has a 26 x 24
array of Programmable Logic Cells (PLCs). The ORT8850H device is based on 1.5V OR4E06 ORCA FPGA and
has a 46 x 44 array. The embedded core which contains the backplane transceivers is attached to the right side of
the device and is integrated directly into the FPGA array. A top level diagram of the basic chip configuration is
shown in Figure 1.
Figure 1. ORT8850 Top Level Diagram
Embedded Core Overview
The ORT8850 embedded core contains a pseudo-SONET block for backplane or intra-board, chip-to-chip commu-
nication. The SONET block includes a High-Speed Interface (HSI) macrocell and a Synchronous Transport Module
(STM) macrocell. It supports eight full-duplex channels and performs data transfer, scrambling/descrambling and
SONET framing at the maximum rate of 850 Mbits/s. Figure 2 shows a top level diagram of the ORT8850 and the
basic data flows through the device.
ORCA Series 4E Based
Orca Series 4E Based
Programmable Logic
Programmable Logic
11
Containing
Containing
Embedded
Embedded
8 Serial I/O
8 Serial I/O
Channels
Channels
Cor
Core
ORCA ORT8850 Data Sheet
e