ort8850 Lattice Semiconductor Corp., ort8850 Datasheet - Page 65

• Manufacturer Part Number: ort8850
• Description: Field-programmable System Chip Fpsc Eight-channel X 850 Mbits/s Backplane Transceiver
• Manufacturer: Lattice Semiconductor Corp.

Table 19. Memory Map Descriptions (Continued)
Lattice Semiconductor
Absolute
Address
3002A*
30027*
30028*
30029*
300CF
300BA
300B7
300A0
300B8
300D0
300A1
300B9
300D1
3005A
3008A
300A2
300D2
0303F
30057
3006F
30087
3009F
30040
30058
30070
30088
30041
30059
30071
30089
30042
30072
(0x)
[3-7]
[0:6]
[0:3]
[4-7]
Bit
[0]
[1]
[2]
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[7]
[0]
Type
R/W
R/W enable AIS-P flag
R/W
R
R
-
-
-
-
LVDS link B1 par-
AIS alarm flags 3,
RX internal path
TOH serial input
FIFO OOS error
port parity error
enable channel
parity error flag
bus parity error
threshold error
enable pointer
DINxx parallel
channel alarm
store overflow
mover elastic
FIFO aligner
ity error flag
Not Used
Not Used
Not Used
Not Used
OOF flag
6, 9, 12
enable
Name
alarm
flag
flag
flag
flag
flag
Reset
Value
(0x)
00
00
0
0
0
0
0
0
0
0
0
0
0
65
Channel alarm bit (30026, ...) enable. Set to 1 to enable
alarm bit to propagate to alarm 0x30010
AIS -P flag alarm enable. Set to 1 to enable alarm bit to
propagate to alarm 0x30010
Pointer mover elastic store overflow flag enable. Set to 1 to
enable alarm bit to propagate to 0x30010
Alarm is set to 1 if either the min or max FIFO threshold
levels are violated, the min and max threshold levels can
be set in address 0x3000A and 0x300B. Alarm enable is
0x30029 bit 0. Write 1 to clear this alarm bit This alarm is
only valid when FIFO OOS flag is also set.
Alarm indicator on receive path internal parity error. Alarm
is enabled in 0x30029 bit 1. Write 1 to clear
Alarm indicator channel is OOF. Alarm enable is 0x30029
bit 2. Write 1 to clear.
Alarm indicator that channel has found a B1 parity error.
Alarm enable is 0x30029 bit 3. Write 1 to clear.
Alarm indicator channel has found a parity error on the
DINxx input from the FPGA.Alarm enable is 0x30029 bit 4.
Write 1 to clear.
Alarm indicator channel has found a parity error on the
TOH_INxx input from the FPGA. Write 1 to clear this
alarm. Alarm enable is 0x30028 bit 5.
Alarm indicates channel group is out of sync. Write 1 to
clear. Alarm enable is 0x30028.
Enable bits for channel alarm register 0x30028. Set to 1 to
enable and to propagate the alarm to register 0x30026 bit
0.
These are the AIS-P alarm flags. 1 if the LVDS input STS #
contains AIS.
ORCA ORT8850 Data Sheet
Description