ort8850 Lattice Semiconductor Corp., ort8850 Datasheet - Page 83

• Manufacturer Part Number: ort8850
• Description: Field-programmable System Chip Fpsc Eight-channel X 850 Mbits/s Backplane Transceiver
• Manufacturer: Lattice Semiconductor Corp.

Lattice Semiconductor
Table 36. ORT8850L and ORT8850H 680-Pin PBGAM Pinout (note: pins labeled “Reserved” should be left
unconnected)
BM680
A18
A33
G5
G4
G3
G2
G1
M4
A1
E4
D2
E3
C4
D1
A2
E2
H5
D3
E1
H4
H3
E5
K5
H2
H1
K3
K2
K1
F5
F4
F3
F2
F1
L5
L4
L1
L3
J5
J4
J3
J2
J1
V
DD
7 (CL)
7 (CL)
7 (CL)
7 (CL)
7 (CL)
7 (CL)
0 (TL)
0 (TL)
0 (TL)
0 (TL)
0 (TL)
0 (TL)
0 (TL)
0 (TL)
0 (TL)
0 (TL)
0 (TL)
0 (TL)
0 (TL)
0 (TL)
0 (TL)
0 (TL)
0 (TL)
0 (TL)
0 (TL)
0 (TL)
0 (TL)
0 (TL)
0 (TL)
0 (TL)
0 (TL)
0 (TL)
0 (TL)
IO Bank
—
—
—
—
—
—
—
—
—
Group
VREF
10
10
10
10
10
10
—
—
—
—
—
—
—
—
—
—
—
—
—
7
7
7
7
7
7
8
8
8
8
8
8
9
9
9
9
9
9
1
1
1
1
1
V
V
V
V
V
DD
DD
DD
DD
V
V
V
V
DD
I/O
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
O
SS
SS
SS
SS
I
I
I
IO0
IO0
IO0
IO7
33
PRD_CFG_N PRD_CFG_N
PPRGRM_N
PRESET_N
PRD_DATA
ORT8850L
V
V
V
V
V
83
PL2D
PL2C
PL2B
PL2A
PL3D
PL3C
PL3B
PL3A
PL4D
PL4C
PL4B
PL4A
PL5D
PL5C
PL5B
PL5A
PL6D
PL6C
PL6B
PL6A
PL7D
PL7C
PL7B
PL7A
PL8D
PL8C
PL8B
PL8A
PL9D
DD
DD
DD
DD
V
V
V
V
DD
SS
SS
SS
SS
IO0
IO0
IO0
IO7
33
PPRGRM_N
PRESET_N
ORT8850H
PRD_DATA
V
V
V
V
V
PL10D
PL10C
PL11D
PL11C
PL12D
PL12C
PL13D
PL13C
PL14D
PL14C
PL15D
PL15C
PL16D
PL2D
PL2C
PL3D
PL3C
PL4D
PL4C
PL5D
PL5C
PL6D
PL6C
PL7D
PL7C
PL8D
PL8C
PL9D
PL9C
DD
DD
DD
DD
V
V
V
V
DD
SS
SS
SS
SS
IO0
IO0
IO0
IO7
33
ORCA ORT8850 Data Sheet
Additional Function
PLL_CK0C/HPPLL
PLL_CK0T/HPPLL
RD_DATA/TDO
A17/PPC_A31
A16/PPC_A30
A15/PPC_A29
A14/PPC_A28
RD_CFG_N
VREF_0_07
VREF_0_08
VREF_0_09
VREF_0_10
VREF_7_01
PRGRM_N
RESET_N
TESTCFG
LDC_N
CS0_N
INIT_N
DOUT
HDC
CS1
D5
D6
D7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
L21C_D2
L22C_D0
L23C_D0
L24C_D0
L25C_D1
L26C_D2
L27C_D0
L28C_D0
L29C_D3
L30C_D0
L31C_D0
L32C_D0
L21T_D2
L22T_D0
L23T_D0
L24T_D0
L25T_D1
L26T_D2
L27T_D0
L28T_D0
L29T_D3
L30T_D0
L31T_D0
L32T_D0
L1C_D0
L2C_D0
L3C_D3
L1T_D0
L2T_D0
Pair
—
—
—
—
—
—
—
—
—
—
—
—
—