HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 137

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

(2) 8-Level Control
In interrupt control mode 2, 8-level mask level determination is performed for the selected
interrupts in interrupt acceptance control according to the interrupt priority level (IPR).
The interrupt source selected is the interrupt with the highest priority level, and whose priority
level set in IPR is higher than the mask level.
Table 5.7
Interrupt Control Mode
0
2
(3) Default Priority Determination
When an interrupt is selected by 8-level control, its priority is determined and a vector number is
generated.
If the same value is set for IPR, acceptance of multiple interrupts is enabled, and so only the
interrupt source with the highest priority according to the preset default priorities is selected and
has a vector number generated.
Interrupt sources with a lower priority than the accepted interrupt source are held pending.
Table 5.8 shows operations and control signal functions in each interrupt control mode.
Table 5.8
Interrupt
Control
Mode
0
2
Legend
118
PR : Sets priority.
IM : Used as interrupt mask bit
— : Not used.
*
*
X : No operation. (All interrupts enabled)
1
2
: Interrupt operation control performed
: Set to 1 when interrupt is accepted.
: Keep the initial setting.
INTM1 INTM0
0
1
Interrupts Selected in Each Interrupt Control Mode (2)
Operations and Control Signal Functions in Each Interrupt Control Mode
Setting
0
0
X —*
Interrupt Acceptance
Control
I
IM
Selected Interrupts
All interrupts
Highest-priority-level (IPR) interrupt whose priority level is greater
than the mask level (IPR > I2 to I0).
1
X —
I2 to I0
IM
8-Level Control
IPR
—*
PR
2
Default
Priority
Determination
T
(Trace)
—
T