HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 599

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

17.12
All interrupts, including NMI interrupt is disabled when flash memory is being programmed or
erased (when the P or E bit is set in FLMCR1), and while the boot program is executing in boot
mode*
1. Interrupt during programming or erasing might cause a violation of the programming or
2. In the interrupt exception handling sequence during programming or erasing, the vector would
3. If interrupt occurred during boot program execution, it would not be possible to execute the
For these reasons, in on-board programming mode alone there are conditions for disabling
interrupt, as an exception to the general rule. However, this provision does not guarantee normal
erasing and programming or MCU operation. All requests, including NMI interrupt, must
therefore be restricted inside and outside the MCU when programming or erasing flash memory.
NMI interrupt is also disabled in the error-protection state while the P or E bit remains set in
FLMCR1.
Notes: 1. Interrupt requests must be disabled inside and outside the MCU until the programming
erasing algorithm, with the result that normal operation could not be assured.
not be read correctly*
normal boot mode sequence.
1
, to give priority to the program or erase operation. There are three reasons for this:
2. The vector may not be read correctly in this case for the following two reasons:
Interrupt Handling when Programming/Erasing Flash Memory
control program has completed programming.
• If flash memory is read while being programmed or erased (while the P or E bit is
• If the interrupt entry in the vector table has not been programmed yet, interrupt
set in FLMCR1), correct read data will not be obtained (undetermined values will
be returned).
exception handling will not be executed correctly.
2
, possibly resulting in MCU runaway.
587