HD6412340 HITACHI [Hitachi Semiconductor], HD6412340 Datasheet - Page 550

• Manufacturer Part Number: HD6412340
• Description: H8S/2345 F-ZTAT Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

17.1.2
The H8S/2345’s on-chip ROM is controlled by the mode pins and register BCRL. The register
configuration is shown in table 17.1.
Table 17.1 ROM Register
Name
Mode control register
Bus control register L
Note: * Lower 16 bits of the address.
17.2
17.2.1
Note: * Determined by pins MD
MDCR is an 8-bit read-only register that indicates the current operating mode of the H8S/2345
Series.
Bit 7—Reserved: Read-only bit, always read as 1.
Bits 6 to 3—Reserved: Read-only bits, always read as 0.
Bits 2 to 0—Mode Select 2 to 0 (MDS2 to MDS0): These bits indicate the input levels at pins
MD
MDS2 to MDS0 are read-only bits, and cannot be written to. The mode pin (MD
levels are latched into these bits when MDCR is read. These latches are canceled by a power-on
reset, but are retained after a manual reset.
538
Bit
Initial value :
R/W
2
to MD
Register Configuration
Register Descriptions
Mode Control Register (MDCR)
0
(the current operating mode). Bits MDS2 to MDS0 correspond to pins MD
:
:
—
—
7
1
—
—
2
6
0
to MD
Abbreviation
MDCR
BCRL
0
.
—
—
5
0
—
—
4
0
R/W
R/W
R/W
—
—
3
0
Initial Value
Undefined
Undefined
MDS2
—*
2
R
MDS1
2
—*
to MD
Address*
H'FF3B
H'FED5
1
R
2
0
) input
to MD
MDS0
—*
0
R
0
.