PIC32MX360F512L-80I/PT Microchip Technology, PIC32MX360F512L-80I/PT Datasheet - Page 177

• Manufacturer Part Number: PIC32MX360F512L-80I/PT
• Description: IC PIC MCU FLASH 512K 100-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX360F512L-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX3xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 5 x 16 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320001, DM320002, MA320001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 85
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 6
• Embedded Interface Type: EUART, I2C, PSP, SPI
• No. Of Pwm Channels: 5
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1000 - PIC32 BREAKOUT BOARDAC244003 - TEST BD MPLAB REAL ICE LOOPBACKAC244006 - KIT MPLAB REAL ICE TRACEDM320001 - KIT EVAL PIC32 STARTERAC164333 - MODULE SKT FOR PM3 100QFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

8.8
The PIC32MX Family CPU responds to interrupt
events as if they are all immediately critical because
the interrupt controller asserts the interrupt request to
the CPU when the interrupt request occurs. The CPU
immediately recognizes the interrupt if the current CPU
priority is lower than the pending priority. Entering and
exiting an ISR consumes clock cycles for saving and
restoring context. Events are asynchronous with
respect to the main program and have a limited
possibility of occurring simultaneously or close together
in time. This prevents the ability of a shared ISR to
process multiple interrupts at one time.
EXAMPLE 8-12:
© 2007 Microchip Technology Inc.
/*
The following code example will set the Interrupt Proximity Coalescing to trigger on interrupt
priority level of 3 or below and the interrupt timer to be set to 0x12345678.
*/
INTCONCLR = 0x00000700;
IPTMPCLR
INTCONSET = 0x00000300;
IPTMR = 0x12345678;
Temporal Proximity Interrupt
Coalescing
= 0xFFFFFFFF;
INTERRUPT PROXIMITY INTERRUPT COALESCING EXAMPLE
// clear TPC
// clear the timer
// set TPC->3
// set the timer to 0x12345678
Advance Information
Interrupt proximity interrupt uses the interrupt proximity
timer, IPTMR, to create a temporal window in which a
group of interrupts of the same, or lower, priority will be
held off. The user can activate temporal proximity inter-
rupt coalescing by performing the following steps:
• Set the TPC<2:0> INTCON<10:8> bit to the pre-
• Load the preferred 32-bit value to IPTMR.
The interrupt proximity timer will trigger when an inter-
rupt request of a priority equal, or lower, matches the
TPC value.
ferred priority level. (Setting TPC to zero will dis-
able the proximity timer.)
PIC32MX FAMILY
DS61143A-page 175