PIC32MX360F512L-80I/PT Microchip Technology, PIC32MX360F512L-80I/PT Datasheet - Page 451

• Manufacturer Part Number: PIC32MX360F512L-80I/PT
• Description: IC PIC MCU FLASH 512K 100-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX360F512L-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX3xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 5 x 16 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320001, DM320002, MA320001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 85
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 6
• Embedded Interface Type: EUART, I2C, PSP, SPI
• No. Of Pwm Channels: 5
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1000 - PIC32 BREAKOUT BOARDAC244003 - TEST BD MPLAB REAL ICE LOOPBACKAC244006 - KIT MPLAB REAL ICE TRACEDM320001 - KIT EVAL PIC32 STARTERAC164333 - MODULE SKT FOR PM3 100QFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

20.2
20.2.1
• The PMP module is enabled and ready when the
• The PMP module is disabled and powered off
• It is recommended to wait for any pending read or
20.2.2
• Setting address bits A15 and A14 = 1 when
• It is always recommended to poll the PMP’s
The PMP module offers two Master modes of operation
featuring 16-bit or 8-bit data (default), up to 16 bits of
address, and all control signals to operate a variety of
external parallel devices such as memory devices,
peripherals, and slave microcontrollers. An example
using Master Mode 2 is shown in Figure 20-2.
FIGURE 20-2:
© 2008 Microchip Technology Inc.
Address Bus
Multiplexed Data
and Address Bus
Data Bus
Control Lines
ADRMUX<1:0> =
ON bit (PMCON<15>) is set = 1, therefore it is
recommended to configure the desired operating
mode prior to enabling the module.
when the ON bit (PMPCON<15>) = 0, thus pro-
viding maximum power savings.
write operation to be completed before
enabling/disabling or re-configuring the module
PMCS2 and PMCS1 are enabled as chip selects
will cause both PMCS2 and PMCS1 to be active
during a read or write operation. This may enable
two devices simultaneously and should be
avoided.
BUSY bit prior to any read or write operation to
ensure the prior PMP operation has completed.
PIC32MX
Modes Of Operation
CONSIDERATIONS
CONSIDERATIONS FOR MASTER
MODES
01
EXAMPLE PMP MASTER
MODE 2, PARTIAL
MULTIPLEXED
INTERFACE
PMA<13:8>
PMD<7:0>
PMD<15:8>
PMA14/PMCS1
PMA15/PMCS2
PMA0/PMALL
PMRD
PMWR
Advance Information
20.2.3
The two Master modes are selected using MODE<1:0>
bits (PMCON<9:8>). Master Mode 1 is selected by
configuring MODE<1:0> bits = 11; Master Mode 2 is
selected by configuring MODE<1:0> bits = 10.
20.2.4
The PMP in Master mode supports data widths 8 and
16 bits wide. By default, the data width is 8-bit,
MODE16 (PMMODE<10>) bit = 0. To select 16-bit data
width, set MODE16 = 1. When configured in 8-Bit Data
mode, the upper 8 bits of the data bus, PMD<15:8>, are
not controlled by the PMP module and are available as
general purpose I/O pins.
20.2.5
Two chip select lines, PMCS1 and PMCS2, are avail-
able for the Master modes. The two chip select lines
are multiplexed with the Most Significant bits of the
address bus A14 and A15. If a pin is configured as a
chip select, it is not included in any PMA<15:0>
address auto-increment/decrement. It is possible to
enable both PMCS2 and PMCS1 as chip selects, or
enable only PMCS2 as a chip select, allowing PMCS1
to function strictly as address line A14. It is not possible
to enable only PMCS1. The chip select signals are con-
figured using the Chip Select Function bits CSF<1:0>
(PMCON <7:6>).
TABLE 20-3:
Refer to Section 20.2.16 “Addressing Consider-
ations” for information regarding chip select address
mapping.
20.2.6
The PMAEN register controls the functionality of the
address pins PMA<15:0>. Setting any PMAEN bit = 1
configures the corresponding PMA pin as an address
line. Those bits set = 0 remain as general purpose I/O
pins.
Refer to Section 20.5 “I/O Pin Control” regarding I/O
pin configuration.
CSF<1:0>
Note:
00
01
10
PIC32MX FAMILY
MASTER MODE SELECTION
8, 16-BIT DATA MODES
On 64-pin devices, data pins PMD<15:8>
are not available.
CHIP SELECTS
PORT PIN CONTROL
PMCS2 = A15, PMCS1 = A14
PMCS2 = Enabled, PMCS1 = A14
PMCS2, PMCS1 = Enabled
CHIP SELECT CONTROL
FUNCTION
DS61143B-page 449