PIC32MX360F512L-80I/PT Microchip Technology, PIC32MX360F512L-80I/PT Datasheet - Page 335

• Manufacturer Part Number: PIC32MX360F512L-80I/PT
• Description: IC PIC MCU FLASH 512K 100-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX360F512L-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX3xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 5 x 16 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320001, DM320002, MA320001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 85
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 6
• Embedded Interface Type: EUART, I2C, PSP, SPI
• No. Of Pwm Channels: 5
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1000 - PIC32 BREAKOUT BOARDAC244003 - TEST BD MPLAB REAL ICE LOOPBACKAC244006 - KIT MPLAB REAL ICE TRACEDM320001 - KIT EVAL PIC32 STARTERAC164333 - MODULE SKT FOR PM3 100QFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

13.3.3
In this mode, the timer clock source is an external clock
source or pulse applied to the T1CK pin, TCS
(T1CON<1>) = 1. To provide synchronization, Timer1
synchronization bit TSYNC (T1CON<2>) must be set
(= 1). The 16-bit TMR1 Count register increments on
every synchronized rising edge of an external clock
when the timer clock prescale <TCKPS> is 1:1.
Timer1 generates a timer match event after the TMR1
Count register matches the PR1 Period register value
(mid-clock cycle on the falling edge), then resets to
0x0000 on the next synchronized external clock cycle.
The timer continues to increment and repeat the period
match until the timer is disabled. For further details
regarding
Section 13.5 “Timer Interrupts”.
For clock prescale = N (other than 1:1), the timer oper-
ates at a clock rate = (external clock/N), therefore, the
TMRx Count register increments on every Nth external
synchronized clock cycle. For further details regarding
timer prescaler, refer to Section 13.4.2 “Timer Clock
Prescaler”.
13.3.3.1
• When using an external clock source, regardless
• Timer1 will not operate from a synchronized exter-
The following steps should be performed to properly
configure the Timer1 peripheral for Synchronous
Counter mode operation.
1.
2.
3.
4.
5.
6.
7.
8.
© 2008 Microchip Technology Inc.
of the Timer1 prescale value, 2-3 external clock
cycles are required, after the ON bit = 1, before
the TMR1 register begins incrementing.
nal clock source while the CPU is in SLEEP
mode, since the synchronizing PB clock is
disabled during Sleep mode.
Clear control bit, ON (T1CON<15>) = 0, to
disable Timer1.
Select the desired timer prescaler using bits,
TCKPS<1:0> (T1CON<5:4).
Set control bit, TCS (T1CON<1>) = 1, to select
an external clock source.
Set control bit, TSYNC (T1CON<2>) = 1, to
enable synchronization.
Clear Timer register TMR1.
Load Period register PR1 with desired
16-bit match value.
If timer interrupts are used, refer to Section 13.5
“Timer Interrupts” for interrupt configuration
steps.
Set control bit, ON (T1CON<15>) = 1, to enable
Timer1.
SYNCHRONOUS EXTERNAL
TIMER
timer
Considerations
events
and
interrupts,
Advance Information
see
EXAMPLE 13-2:
13.3.4
In this mode, the timer clock source is an external clock
source or pulse applied to the T1CK pin, TCS
(T1CON<1>) = 1. Clock synchronization is not
required, therefore, the Timer1 clock synchronization
bit should be cleared, TSYNC (T1CON<2>) = 0. The
16-bit TMR1 Count register increments on every rising
edge of an external clock when the timer clock prescale
<TCKPS> is 1:1.
Timer1 generates a timer match event after the TMR1
Count register matches the PR1 register value (mid-
clock cycle on the falling edge), then resets to 0x0000
on the next external clock cycle. The timer continues
to increment and repeat the period match until the timer
is disabled. For further details regarding timer events
and interrupts, see Section 13.5 “Timer Interrupts”.
For clock prescale = N (other than 1:1), the timer
operates at a clock rate = (external clock/N), there-
fore, the TMR1 Count register increments on every
Nth external clock cycle. For further details regarding
the timer prescaler, refer to Section 13.4.2 “Timer
Clock Prescaler”.
13.3.4.1
• Regardless of the Timer1 prescale setting, 2-3
• Timer1 can operate while the CPU is in Sleep
• The Timer1 interrupt can be used to wake the
• Typical use is with the Secondary Low-Power
T1CON = 0x0;
T1CON = 0x0036
TMR1 = 0x0;
PR1 = 0x3FFF;
T1CONSET = 0x8000; // Start Timer
external clocks are required after the ON bit = 1,
before the TMR1 register begins incrementing.
mode.
CPU from Sleep mode.
Oscillator, SOSC and RTCC Real-Time Clock
Calendar peripheral.
Note:
PIC32MX FAMILY
ASYNCHRONOUS EXTERNAL
TIMER
The SOSC oscillator may be used by the
CPU as a low-power clock source.
Timer 1 does not have exclusive usage to
this oscillator. Refer to the “PIC32MX
Family Reference Manual” (DS61132)
regarding the operation of the Secondary
Low-Power Oscillator.
Considerations
SYNCHRONOUS
EXTERNAL TIMER
INITIALIZATION
// Stop Timer and reset
// Set prescaler=1:256,
// external clock,
// synchronous mode
// Clear timer register
// Load period register
DS61143B-page 333