PIC32MX360F512L-80I/PT Microchip Technology, PIC32MX360F512L-80I/PT Datasheet - Page 395

• Manufacturer Part Number: PIC32MX360F512L-80I/PT
• Description: IC PIC MCU FLASH 512K 100-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX360F512L-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX3xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 5 x 16 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320001, DM320002, MA320001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 85
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 6
• Embedded Interface Type: EUART, I2C, PSP, SPI
• No. Of Pwm Channels: 5
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1000 - PIC32 BREAKOUT BOARDAC244003 - TEST BD MPLAB REAL ICE LOOPBACKAC244006 - KIT MPLAB REAL ICE TRACEDM320001 - KIT EVAL PIC32 STARTERAC164333 - MODULE SKT FOR PM3 100QFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

17.2.4
The module supports a very basic framed SPI protocol
while operating in either Master or Slave modes. The
following features are provided in the SPI module to
support Framed SPI modes:
• The control bit, FRMEN (SPIxCON<31>), enables
• The control bit, FRMSYNC (SPIxCON<30>),
• The FRMPOL (SPIxCON<29>) determines the
FIGURE 17-5:
© 2008 Microchip Technology Inc.
Framed SPI mode and causes the SSx pin to be
used as a frame synchronization pulse input or
output pin. The state of the SSEN (SPIxCON<7>)
is ignored.
determines whether the SSx pin is an input or an
output (i.e., whether the module receives or
generates the frame synchronization pulse).
frame synchronization pulse polarity for a single
SPI clock cycle.
Note 1: In Framed SPI modes, the SSx pin is used to transmit/receive the frame synchronization pulse.
FRAMED SPI MODES
2: Framed SPI modes require the use of all four pins, i.e., using the SSx pin is not optional.
3: The SPIxTXB and SPIxRXB registers are memory mapped to the SPIxBUF register.
[SPI Master, Frame Master]
MSb
Serial Transmit Buffer
Serial Receive Buffer
SPI MASTER, FRAME MASTER CONNECTION DIAGRAM
PIC32MX
Shift Register
(SPIxRXB)
(SPIxTXB)
(SPIxBUF)
SPI Buffer
(SPIxSR)
(3)
(3)
LSb
Advance Information
SDOx
SCKx
SDIx
SSx
Serial Clock
Frame Sync
Pulse
(1, 2)
The following framed SPI modes are supported by the
SPI module:
• Frame Master mode: The SPI module generates
• Frame Slave mode: The SPI module uses a frame
The Framed SPI modes are supported in conjunction
with the Master and Slave modes. Thus, the following
framed SPI configurations are available:
• SPI Master mode and Frame Master mode
• SPI Master mode and Frame Slave mode
• SPI Slave mode and Frame Master mode
• SPI Slave mode and Frame Slave mode
These four modes determine whether or not the SPI
module generates the serial clock and the frame
synchronization pulse.
the frame synchronization pulse and provides this
pulse to other devices at the SSx pin.
synchronization pulse received at the SSx pin.
SDIx
SDOx
SCKx
SSx
PIC32MX FAMILY
MSb
[SPI Slave, Frame Slave]
Serial Receive Buffer
Serial Transmit Buffer
Shift Register
PROCESSOR 2
(SPIxRXB)
(SPIxSR)
(SPIxTXB)
(SPIxBUF)
SPI Buffer
LSb
DS61143B-page 393