PIC32MX360F512L-80I/PT Microchip Technology, PIC32MX360F512L-80I/PT Datasheet - Page 444

• Manufacturer Part Number: PIC32MX360F512L-80I/PT
• Description: IC PIC MCU FLASH 512K 100-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX360F512L-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX3xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 5 x 16 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320001, DM320002, MA320001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 85
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 6
• Embedded Interface Type: EUART, I2C, PSP, SPI
• No. Of Pwm Channels: 5
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1000 - PIC32 BREAKOUT BOARDAC244003 - TEST BD MPLAB REAL ICE LOOPBACKAC244006 - KIT MPLAB REAL ICE TRACEDM320001 - KIT EVAL PIC32 STARTERAC164333 - MODULE SKT FOR PM3 100QFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC32MX FAMILY
REGISTER 20-2:
DS61143B -page 442
bit 31
bit 23
bit 15
bit 7
Legend:
R = Readable bit
U = Unimplemented bit
bit 31-16
bit 15
bit 14-13
bit 12-11
bit 10
Note 1:
R/W-0
BUSY
U-0
U-0
R-0
—
—
WAITB1<1:0>
2:
3:
4:
Whenever WAITM3:WAITM0 = 0000, WAITB and WAITE bits are ignored and forced to 1 T
for a write operation; WAITB = 1 T
When ADDR15 and ADDR14 are used as CS2 and CS1, or ADDR15 is used as CS2, these bits are not
subject to auto-increment/decrement.
In Master Mode 1 or Master Mode 2, data pins PMD<15:0> are active when MODE16 = 1; data pins
PMD<7:0> are active when MODE16 = 0.
On 64-pin devices, data pins PMD<15:8> are not available.
Unimplemented: Read as ‘0’
BUSY: Busy bit (Master modes only)
1 = Port is busy
0 = Port is not busy
IRQM<1:0>: Interrupt Request Mode bits
11 = Reserved – do not use
10 = Interrupt generated when Read Buffer 3 is read or Write Buffer 3 is written (Buffered PSP mode)
01 = Interrupt generated at the end of the read/write cycle
00 = No Interrupt generated
INCM<1:0>: Increment Mode bits
11 = Slave mode read and write buffers auto-increment (MODE<1:0> = 00 only)
10 = Decrement ADDR<15:0> by 1 every read/write cycle
01 = Increment ADDR<15:0> by 1 every read/write cycle
00 = No increment or decrement of address
MODE16: 8/16-Bit Mode bit
1= 16-bit mode: a read or write to the data register invokes a single 16-bit transfer
0= 8-bit mode: a read or write to the data register invokes a single 8-bit transfer
R/W-0
R/W-0
or on a read or write operation when PMA<1:0> = 11 (Addressable PSP mode only)
U-0
U-0
(1)
—
—
PMMODE: PARALLEL PORT MODE REGISTER
IRQM<1:0>
W = Writable bit
-n = Bit Value at POR: (‘0’, ‘1’, x = Unknown)
R/W-0
R/W-0
U-0
U-0
—
—
Advance Information
PBCLK
R/W-0
R/W-0
U-0
U-0
—
—
WAITM<3:0>
cycle, WAITE = 0 T
INCM<1:0>
P = Programmable bit
R/W-0
R/W-0
U-0
U-0
—
—
PBCLK
(2)
(2)
MODE16
R/W-0
R/W-0
cycles for a read operation.
U-0
U-0
—
—
© 2008 Microchip Technology Inc.
r = Reserved bit
R/W-0
R/W-0
U-0
U-0
—
—
WAITE1<1:0>
MODE<1:0>
(4)
PBCLK
R/W-0
R/W-0
U-0
U-0
(1)
—
—
cycle
bit 24
bit 16
bit 8
bit 0