PIC32MX360F512L-80I/PT Microchip Technology, PIC32MX360F512L-80I/PT Datasheet - Page 299

IC PIC MCU FLASH 512K 100-TQFP

PIC32MX360F512L-80I/PT

Manufacturer Part Number
PIC32MX360F512L-80I/PT
Description
IC PIC MCU FLASH 512K 100-TQFP
Manufacturer
Microchip Technology
Series
PIC® 32MXr

Specifications of PIC32MX360F512L-80I/PT

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
100-TFQFP
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC32MX3xx
Core
MIPS
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C , SPI , UART
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
85
Number Of Timers
5 x 16 bit
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM320001, DM320002, MA320001
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Controller Family/series
PIC32
No. Of I/o's
85
Ram Memory Size
32KB
Cpu Speed
80MHz
No. Of Timers
6
Embedded Interface Type
EUART, I2C, PSP, SPI
No. Of Pwm Channels
5
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1000 - PIC32 BREAKOUT BOARDAC244003 - TEST BD MPLAB REAL ICE LOOPBACKAC244006 - KIT MPLAB REAL ICE TRACEDM320001 - KIT EVAL PIC32 STARTERAC164333 - MODULE SKT FOR PM3 100QFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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11.33.1
Three possible link states are described in the following
subsections:
• Reset
• Idle and Suspend
• Resume Signalling
11.33.1.1
As a host, software is required to drive Reset signaling.
It may do this by setting USBRST (U1CON<4>). As per
the USB specification, the host must drive the Reset for
at least 50 ms. (This does not have to be continuous
Reset signaling. Refer to the USB 2.0 specification for
more information.) Following Reset, the host must not
initiate any downstream traffic for another 10 ms.
As a device, the USB module will assert the URSTIF
(U1IR<0>) interrupt when it has detected Reset signal-
ing for 2.5 μs. Software must perform any Reset initial-
ization processing at this time. This includes setting the
address register to 0x00 and enabling Endpoint 0. The
URSTIF interrupt will not be set again until the Reset
signaling has gone away and then has been detected
again for 2.5 μs.
11.33.1.2
The Idle state of the USB is a constant J state. When
the USB has been Idle for 3 ms, a device should go into
suspend state. During active operation, the USB host
will send a SOF token every 1 ms, preventing a device
from going into suspend state.
Once the USB link is in the suspend state, a USB host
or device must drive resume signaling prior to initiating
any bus activity. (The USB link may also be discon-
nected.)
As a USB host, software should consider the link in
suspend state as soon as software clears the SOFEN
(U1CON<0>).
As a USB device, hardware will set the IDLEIF
(U1IR<4>) interrupt when it detects a constant Idle on
the bus for 3 ms. Software should consider the link in
suspend state when the IDLEIF interrupt is set.
Once a suspend condition has been detected, the soft-
ware may wish to place the USB hardware in a Sus-
pend mode by setting USUSPEND (U1PWRC<1>).
The hardware Suspend mode gates the USB module’s
48 MHz clock and places the USB transceiver in a Low-
Power mode.
© 2008 Microchip Technology Inc.
Note:
USB speed, transceiver and pull-ups
should only be configured during the mod-
ule set-up phase. It is not recommended to
change these settings while the module is
enabled.
USB LINK STATES
Reset
Idle and Suspend
Advance Information
Additionally, the user may put the PIC32MX into Sleep
mode while the link is suspended.
11.33.1.3
If software wants to wake the USB from suspend state,
it may do so by setting RESUME (U1CON<2>). This
will cause the hardware to generate the proper resume
signaling (including finishing with a low-speed EOP if a
host).
A USB device should not drive resume signaling unless
the Idle state has persisted for at least 5 ms. The USB
host also must have enabled the function for remote
wake-up.
Software must set RESUME for 1-15 ms if a USB
device, or >20 ms if a USB host, then clear it to enable
remote wake-up. For more information on RESUME
signaling, see Section 7.1.7.7, 11.9 and 11.4.4 in the
USB 2.0 specification.
Writing RESUME will automatically clear the special
hardware suspend (low-power) state.
If the part is acting as a USB host, software should, at
minimum, set the SOFEN (U1CON<0>) after driving its
resume signaling. Otherwise, the USB link would return
right back to the suspend state. Also, software must not
initiate any downstream traffic for 10 ms following the
end of resume signaling.
11.33.1.4
When the USB logic detects resume signaling on the
USB bus for 2.5 μs, hardware will set the RESUMEIF
(U1IR<5>) interrupt.
A device receiving resume signaling must prepare itself
to receive normal USB activity. A host receiving resume
signaling must immediately start driving resume signal-
ing of its own. The special hardware suspend (low-
power) state is automatically cleared upon receiving
any activity on the USB link.
Reception of any activity on the USB link (this may be
due to resume signaling or a link disconnect) while the
PIC32MX is in Sleep mode will cause the ACTVIF
(U1OTGIR<4>) interrupt to be set. This will cause
wake-up from Sleep.
11.33.1.5
SRP support is not required by non-OTG applications.
SRP may only be initiated at full speed. Refer to the
On-The-Go Supplement specification for more infor-
mation regarding SRP.
An OTG A-device or embedded host may decide to
power-down the V
USB link. Software may do this by clearing VBUSON
(U1OTGCON<3>). When the V
down, the A-device is said to have ended a USB ses-
sion.
PIC32MX FAMILY
Receiving Resume Signaling
Driving Resume Signaling
SRP Support
BUS
supply when it is not using the
BUS
DS61143B-page 297
supply is powered

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