PIC32MX360F512L-80I/PT Microchip Technology, PIC32MX360F512L-80I/PT Datasheet - Page 336

IC PIC MCU FLASH 512K 100-TQFP

PIC32MX360F512L-80I/PT

Manufacturer Part Number
PIC32MX360F512L-80I/PT
Description
IC PIC MCU FLASH 512K 100-TQFP
Manufacturer
Microchip Technology
Series
PIC® 32MXr

Specifications of PIC32MX360F512L-80I/PT

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
100-TFQFP
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC32MX3xx
Core
MIPS
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C , SPI , UART
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
85
Number Of Timers
5 x 16 bit
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM320001, DM320002, MA320001
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Controller Family/series
PIC32
No. Of I/o's
85
Ram Memory Size
32KB
Cpu Speed
80MHz
No. Of Timers
6
Embedded Interface Type
EUART, I2C, PSP, SPI
No. Of Pwm Channels
5
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1000 - PIC32 BREAKOUT BOARDAC244003 - TEST BD MPLAB REAL ICE LOOPBACKAC244006 - KIT MPLAB REAL ICE TRACEDM320001 - KIT EVAL PIC32 STARTERAC164333 - MODULE SKT FOR PM3 100QFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC32MX360F512L-80I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC32MX360F512L-80I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
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PIC32MX360F512L-80I/PT
Quantity:
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PIC32MX FAMILY
13.4
Due to the asynchronous nature of Timer1 operating in
Asynchronous Clock mode, reading and writing to the
TMR1
between the asynchronous clock source and the inter-
nal PBCLK (Peripheral Bus Clock). Timer1 features a
Timer Write Disable (TWDIS) control bit (T1CON<12>)
and a TWIP (TImer Write in Progress) Status bit
(T1CON<11>). These bits provide the user with 2
options for safely writing to the TMR1 Count register
while Timer1 is enabled. These bits have no affect in
Synchronous Clock modes.
• Option 1 – Legacy Timer1 Write mode, TWDIS bit
• Option 2 – New synchronized Timer1 Write mode,
Writing to the TMR1 Count register requires 2 to 3
asynchronous external clock cycles for the value to be
synchronized into the TMR1 Count register.
Reading from the TMR1 Count register requires 2
PBCLK cycle delays between the current unsynchro-
nized value in the TMR1 Count register and the
synchronized value returned by the read operation. In
other words, the value read is always 2 PBCLK cycles
behind the actual value in the TMR1 Count register.
The following steps should be performed to properly
configure the Timer1 peripheral for Asynchronous
Counter mode operation.
1.
2.
3.
4.
5.
6.
7.
8.
DS61143B-page 334
= 0. To determine when it is safe to write to the
TMR1 Count register, it is recommended to poll
the TWIP bit. When TWIP = 0, it is safe to perform
the next write operation to the TMR1 Count regis-
ter. When TWIP = 1, the previous write operation
to the TMR1 Count register is still being synchro-
nized and any additional write operations should
wait until TWIP = 0.
TWDIS bit = 1. A write to the TMR1 Count register
can be performed at any time. However, if the pre-
vious write operation to the TMR1 Count register
is still being synchronized, any additional write
operations are ignored.
Clear control bit, ON (T1CON<15>) = 0, to
disable Timer1.
Select the desired timer prescaler using bits,
TCKPS<1:0> (T1CON<5:4).
Set control bit, TCS (T1CON<1>) = 1, to select
an external clock source.
Set control bit, TSYNC (T1CON<2>) = 0, to
disable synchronization.
Clear Timer Register, TMR1.
Load Period Register, PR1, with desired 16-bit
match value.
If timer interrupts are used, refer to 13.5 “Timer
Interrupts” for interrupt configuration steps.
Set control bit, ON (T1CON<15>) = 1, to enable
Timer1.
Count
Reading and Writing TMR1
Register
register
requires
synchronization
Advance Information
EXAMPLE 13-3:
T1CON = 0x0;
T1CON = 0x0012;
TMR1 = 0x0;
PR1 = 0x7FFF;
T1CONSET = 0x8000; // Start Timer
ASYNCHRONOUS
EXTERNAL TIMER
INITIALIZATION
© 2008 Microchip Technology Inc.
// Set prescaler at 1:8,
// external clock source,
// asynchronous mode
// Clear timer register
// Load period register
// Stop Time and reset

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