PIC32MX360F512L-80I/PT Microchip Technology, PIC32MX360F512L-80I/PT Datasheet - Page 465

• Manufacturer Part Number: PIC32MX360F512L-80I/PT
• Description: IC PIC MCU FLASH 512K 100-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX360F512L-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX3xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 5 x 16 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320001, DM320002, MA320001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 85
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 6
• Embedded Interface Type: EUART, I2C, PSP, SPI
• No. Of Pwm Channels: 5
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1000 - PIC32 BREAKOUT BOARDAC244003 - TEST BD MPLAB REAL ICE LOOPBACKAC244006 - KIT MPLAB REAL ICE TRACEDM320001 - KIT EVAL PIC32 STARTERAC164333 - MODULE SKT FOR PM3 100QFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

20.5
20.5.1
TABLE 20-11: REQUIRED I/O PIN RESOURCES FOR MASTER MODES
When enabling any of the PMP module for Slave mode
operations, the PMPCS1, PMRD, PMWR control pins,
PMD<7:0> data pins and PMA<1:0> address pins are
TABLE 20-12: REQUIRED I/O PIN RESOURCES FOR SLAVE MODES
20.5.2
The following table provides a summary of settings
required to enable the I/O pin resources used with this
module. The PMAEN register controls the functionality
© 2008 Microchip Technology Inc.
PMPCS2 / PMA15
PMPCS1 / PMA14
PMA<13:2>
PMA1 / PMALH
PMA0 / PMALL
PMRD / PMWR
PMWR / PMENB
PMD<15:0>
PMPCS1 / PMA14
PMA1 / PMALH
PMA0 / PMALL
PMRD / PMWR
PMWR / PMENB
PMD<7:0>
Note 1: “No” indicates the pin is not required and is available as a general purpose I/O pin when the corresponding
Note 1: “No” indicates the pin is not required and is available as a general purpose I/O pin when the corresponding
I/O Pin Name
I/O Pin
2: Depending on the application, not all PMA<15:0> or CS2, CS1 may be required.
2: Slave modes use PMD<7:0> only. Pins PMD<15:8> are available as general purpose I/O pins. Control bit
3: When Partial Multiplex mode is selected (ADDRMUX<1:0> = 01), the lower 8 Address lines are multi-
4: When Full Multiplex mode is selected (ADDRMUX<1:0> = 10 or 11), all 16 Address lines are multiplexed
5: If MODE16 = 0, then only PMD<7:0> are required. PMD<15:8> are available as general purpose
6: Data pins PMD<15:0> are available on 100-pin PIC32MX devices and larger. For all other device variants,
I/O Pin Control
Name
I/O PIN RESOURCES
I/O PIN CONFIGURATION
PMAEN bit is cleared, = 0.
plexed with PMD<7:0>, PMA<0> becomes (PMALL) and PMA<7:1> are available as general purpose I/O
pins.
with PMD<15:0>, PMA<0> becomes (PMALL), PMA<1> becomes (PMALH) and PMA<13:2> are avail-
able as general purpose I/O pins.
I/O pins.
only pins PMD<7:0> are available.
PMAEN bit is cleared, = 0.
MODE16 (PMMODE<10>) is ignored.
multiplex
Legacy
Yes
Yes
Yes
Yes
Yes
No
No
No
No
Yes
Yes
Yes
Yes
De-
Yes
(1)
(1)
(1)
(1)
(2)
(2)
(2)
(5)
(2)
Multiplex
Buffered
Partial
Advance Information
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
Yes
Yes
Yes
Yes
Yes
(1)
(1)
(1)
(2)
(2)
(2)
(3)
(2)
(5)
Addressable
Multiplex
Yes
Yes
Yes
Yes
Yes
Yes
No
Full
Yes
Yes
Yes
Yes
Yes
Yes
Yes
(1)
automatically enabled and configured. The user is how-
ever responsible for selecting the appropriate polarity
for these control lines.
of pins PMA<15:0>. Setting any PMAEN bit = 1 con-
figures the corresponding PMA pin as an address line.
Those bits set = 0 remain as general purpose I/O pins.
(2)
(2)
(2)
(4)
(4)
(5)
PMP Chip Select 2 / Address A15
PMP Chip Select 1 / Address A14
PMP Address A13..A2
PMP Address A1 / Address Latch High
PMP Address A0 / Address Latch Low
PMP Read / Write Control
PMP Write / Enable Control
PMP Bidirectional Data Bus D15..D0
Chip Select
Address A1
Address A0
Read Control
Write Control
Bidirectional Data Bus D7..D0
PIC32MX FAMILY
Functional Description
Functional Description
DS61143B-page 463