AT32UC3B1128-AUT Atmel, AT32UC3B1128-AUT Datasheet - Page 338

• Manufacturer Part Number: AT32UC3B1128-AUT
• Description: IC MCU AVR32 128KB FLASH 48-TQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3B1128-AUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: I²C, IrDA, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 28
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TQFP, 48-VQFP
• Package: 48TQFP
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 60 MHz
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 28
• Interface Type: I2S/SPI/TWI/USART/USB
• On-chip Adc: 6-chx10-bit
• Number Of Timers: 3
• For Use With: ATSTK600-TQFP48 - STK600 SOCKET/ADAPTER 48-TQFPATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1101 - KIT DEV/EVAL FOR AVR32 AT32UC3B
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

21.7.1
Name:
Access Type:
Offset:
Reset Value:
•
•
•
•
•
•
•
32059K–03/2011
RTSDIS/RCS: Request to Send Disable/Release SPI Chip Select
RTSEN/FCS: Request to Send Enable/Force SPI Chip Select
DTRDIS: Data Terminal Ready Disable
DTREN: Data Terminal Ready Enable
RETTO: Rearm Time-out
RSTNACK: Reset Non Acknowledge
RSTIT: Reset Iterations
RETTO
TXDIS
31
23
15
–
–
7
If USART does not operate in SPI Master Mode (MODE … 0xE):
0: No effect.
1: Drives the pin RTS to 1.
If USART operates in SPI Master Mode (MODE = 0xE):
RCS = 0: No effect.
RCS = 1: Releases the Slave Select Line NSS (RTS pin).
If USART does not operate in SPI Master Mode (MODE … 0xE):
0: No effect.
1: Drives the pin RTS to 0.
If USART operates in SPI Master Mode (MODE = 0xE):
FCS = 0: No effect.
FCS = 1: Forces the Slave Select Line NSS (RTS pin) to 0, even if USART is no transmitting, in order to address SPI slave
devices supporting the CSAAT Mode (Chip Select Active After Transfer).
0: No effect.
1: Drives the pin DTR to 1.
0: No effect.
1: Drives the pin DTR at 0.
0: No effect
1: Restart Time-out
0: No effect
1: Resets NACK in CSR.
0: No effect.
1: Resets ITERATION in CSR. No effect if the ISO7816 is not enabled.
Control Register
RSTNACK
TXEN
30
22
14
CR
Write-only
0x0
-
–
–
6
RXDIS
RSTIT
29
21
13
–
–
5
SENDA
RXEN
28
20
12
–
–
4
RTSDIS/RCS
STTTO
RSTTX
27
19
11
–
3
RTSEN/FCS
STPBRK
RSTRX
26
18
10
–
2
STTBRK
DTRDIS
25
17
–
9
1
–
AT32UC3B
RSTSTA
DTREN
24
16
–
8
0
–
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