AT32UC3B1128-AUT Atmel, AT32UC3B1128-AUT Datasheet - Page 546

IC MCU AVR32 128KB FLASH 48-TQFP

AT32UC3B1128-AUT

Manufacturer Part Number
AT32UC3B1128-AUT
Description
IC MCU AVR32 128KB FLASH 48-TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheets

Specifications of AT32UC3B1128-AUT

Core Processor
AVR
Core Size
32-Bit
Speed
60MHz
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
28
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TQFP, 48-VQFP
Package
48TQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
60 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
28
Interface Type
I2S/SPI/TWI/USART/USB
On-chip Adc
6-chx10-bit
Number Of Timers
3
For Use With
ATSTK600-TQFP48 - STK600 SOCKET/ADAPTER 48-TQFPATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1101 - KIT DEV/EVAL FOR AVR32 AT32UC3B
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3B1128-AUT
Manufacturer:
Atmel
Quantity:
10 000
24.7.11
Name:
Access Type:
Offset:
Reset Value:
• CPRD: Channel Period
32059K–03/2011
31
23
15
7
Only the first
If the waveform is left-aligned, then the output waveform period depends on the counter source clock and can be calculated:
If the waveform is center-aligned, then the output waveform period depends on the counter source clock and can be calculated:
Channel Period Register
20
30
22
14
6
bits (internal channel counter size) are significant.
CPRDx
Read/Write
0x208
0x00000000
– By using the Master Clock (CLK_PWM) divided by an X given prescaler value (with
– By using a Master Clock divided by one of both DIVA or DIVB divider, the formula
– By using the Master Clock (CLK_PWM) divided by an X given prescaler value (with
– By using a Master Clock divided by one of both DIVA or DIVB divider, the formula
X being 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, or 1024). The resulting period formula
will be:
becomes, respectively:
X being 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, or 1024). The resulting period formula
will be:
becomes, respectively:
(
------------------------------ -
(
----------------------------------------- -
(
---------------------------------------- -
(
--------------------------------------------------- -
CLK_PWM
X CPRD
CRPD
2
2
CLK_PWM
CLK_PWM
×
×
29
21
13
×
5
CLK_PWM
X CPRD
CPRD DIVA
×
×
DIVA
)
×
)
)
or
)
28
20
12
4
(
--------------------------------------------- -
or
CRPD
CLK_PWM
(
--------------------------------------------------- -
2 CPRD
CPRD
CPRD
CPRD
CPRD
×
×
CLK_PWM
DIVAB
×
27
19
11
)
DIVB
3
)
26
18
10
2
25
17
9
1
AT32UC3B
24
16
8
0
546

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