HD64F3664H Renesas Electronics America, HD64F3664H Datasheet - Page 227

IC H8 MCU FLASH 32K 64QFP

HD64F3664H

Manufacturer Part Number
HD64F3664H
Description
IC H8 MCU FLASH 32K 64QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of HD64F3664H

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
I²C, SCI
Peripherals
PWM, WDT
Number Of I /o
29
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Serial Communication Interface 3 (SCI3) can handle both asynchronous and clocked synchronous
serial communication. In the asynchronous method, serial data communication can be carried out
using standard asynchronous communication chips such as a Universal Asynchronous
Receiver/Transmitter (UART) or an Asynchronous Communication Interface Adapter (ACIA). A
function is also provided for serial communication between processors (multiprocessor
communication function).
Figure 14.1 shows a block diagram of the SCI3.
14.1
• Choice of asynchronous or clocked synchronous serial communication mode
• Full-duplex communication capability
• On-chip baud rate generator allows any bit rate to be selected
• External clock or on-chip baud rate generator can be selected as a transfer clock source.
• Six interrupt sources
Asynchronous mode
• Data length: 7 or 8 bits
• Stop bit length: 1 or 2 bits
• Parity: Even, odd, or none
• Receive error detection: Parity, overrun, and framing errors
• Break detection: Break can be detected by reading the RxD pin level directly in the case of a
Clocked synchronous mode
• Data length: 8 bits
• Receive error detection: Overrun errors detected
The transmitter and receiver are mutually independent, enabling transmission and reception to
be executed simultaneously.
Double-buffering is used in both the transmitter and the receiver, enabling continuous
transmission and continuous reception of serial data.
Transmit-end, transmit-data-empty, receive-data-full, overrun error, framing error, and parity
error.
framing error
Section 14 Serial Communication Interface 3 (SCI3)
Features
Section 14 Serial Communication Interface 3 (SCI3)
Rev. 6.00 Mar. 24, 2006 Page 197 of 412
REJ09B0142-0600

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